CS5461A-ISZR Cirrus Logic Inc, CS5461A-ISZR Datasheet - Page 29

IC Sngl-Phs Bi-Directional Power/Energy

CS5461A-ISZR

Manufacturer Part Number
CS5461A-ISZR
Description
IC Sngl-Phs Bi-Directional Power/Energy
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5461A-ISZR

Input Impedance
30 KOhm
Measurement Error
0.1%
Voltage - I/o High
0.8V
Voltage - I/o Low
0.2V
Current - Supply
2.9mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Meter Type
Single Phase
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1552 - BOARD EVAL & SOFTWARE CS5461A
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5461A-ISZR
Manufacturer:
CIRRUS
Quantity:
20 000
6.10 Status Register and Mask Register ( Status , Mask )
DS661F2
Address: 15 (Status); 26 (Mask)
Default =
The Status Register indicates status within the chip. In normal operation, writing a '1' to a bit will cause the bit
to reset. Writing a '0' to a bit will not change it’s current state.
The Mask Register is used to control the activation of the INT pin. Placing a logic '1' in a Mask bit will allow the
corresponding bit in the Status Register to activate the INT pin when the status bit is asserted.
CRDY
IOR
VOR
IROR
VROR
EOR
TUP
TOD
VOD (IOD)
LSD
VSAG
DRDY
DRDY
TUP
IC
23
15
7
0x000001 (Status Register), 0x000000 (Mask Register)
IROR
TOD
22
14
brations, this bit indicates the end of a calibration sequence.
due to an input above full scale.
lates due to an input above full scale. The level at which the modulator oscillates is significantly
higher than the voltage (current) channel’s differential input voltage range.
Note:
old (PMLO), with respect to AGND pin. The LSD bit cannot be reset until the voltage at PFMON
pin rises back above the high-voltage threshold (PMHI).
tus Register has not been successfully read.
Data Ready. During conversions, this bit will indicate the end of computation cycles. For cali-
Conversion Ready. Indicates a new conversion is ready. This will occur at the output word rate.
Current Out of Range. Set when the Instantaneous Current Register overflows.
Voltage Out of Range. Set when the Instantaneous Voltage Register overflows.
I
Energy Out of Range. Set when P
Temperature Updated. Indicates the Temperature Register has updated.
Modulator oscillation detected on the temperature channel. Set when the modulator oscillates
Modulator oscillation detected on the voltage (current) channel. Set when the modulator oscil-
Low Supply Detect. Set when the voltage at the PFMON pin falls below the low-voltage thresh-
Indicates a voltage sag has occurred.
Invalid Command. Normally logic 1. Set to logic 0 if an invalid command is received or the Sta-
V
6
RMS
RMS
Out of Range. Set when the I
Out of Range. Set when the V
The IOD and VOD bits may be ‘falsely’ triggered by very brief voltage spikes from the
power line. This event should not be confused with a DC overload situation at the in-
puts, when the IOD and VOD bits will re-assert themselves even after being cleared,
multiple times.
VROR
21
13
5
CRDY
EOR
VOD
20
12
4
ACTIVE
RMS
RMS
See Section 5.5 Voltage Sag-detect Feature
Register overflows.
Register overflows.
overflows.
IOD
19
11
3
LSD
18
10
2
VSAG
IOR
17
9
1
CS5461A
on page 19.
VOR
16
IC
8
0
29

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