CS5464-ISZR Cirrus Logic Inc, CS5464-ISZR Datasheet - Page 30

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CS5464-ISZR

Manufacturer Part Number
CS5464-ISZR
Description
IC 3-Channel Single Phase Power/Energy
Manufacturer
Cirrus Logic Inc
Type
Single Phase Power/Energy ICr
Datasheet

Specifications of CS5464-ISZR

Input Impedance
30 KOhm
Measurement Error
0.1%
Voltage - I/o High
0.8V
Voltage - I/o Low
0.2V
Current - Supply
3.5mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Meter Type
Single Phase
Output Voltage Range
2.4 V to 2.6 V
Output Current
100 mA
Input Voltage Range
3.135 V to 5.25 V
Input Current
10 mA
Power Dissipation
500 mW
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1554 - BOARD EVAL FOR CS5464 ADC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8.2.7 Peak Current (I1
8.2.8 Apparent Power (S1, S2)
8.2.9 Power Factor (PF1, PF2)
8.2.10 Temperature (T)
8.2.11 Active, Apparent, and Reactive Energy Pulse Outputs (E
30
MSB
MSB
MSB
MSB
-(2
-(2
-(2
-(2
-(2
0
0
0
7
0
T contains results from the on-chip temperature measurement. By default, T uses the Celsius scale, and is a
two's complement value in the range of -128.0 ≤ value < 128.0 (
T can be rescaled by the application using the T
)
)
)
)
)
Address: 18 ( I1
Peak current, I1
samples with the greatest magnitude detected during the last low-rate interval. These are two's complement
values in the range of -1.0 ≤ value < 1.0, with the binary point to the right of the MSB.
Address: 20 (S1), 24 (S2)
Apparent power S1 ( S2 ) is the product of V1
values in the range of 0 ≤ value < 1.0, with the binary point to the right of the MSB.
Address: 21 ( PF1 ), 25 ( PF2 )
Power factor is calculated by dividing active power by apparent power. The sign is determined by the active
power sign. These are two's complement values in the range of -1.0 ≤ value < 1.0, with the binary point to the
right of the MSB.
Address: 29
These drive the pulse outputs when configured to do so. If the Ichan bit in Modes is “0”, these registers are
driven from P1
S2 , and Q2
binary point to the right of the MSB.
MSB
2
2
2
2
2
-1
-1
-1
-1
6
2
2
2
2
2
-2
-2
-2
-2
AVG
5
(E
AVG
PULSE
, respectively. These are two's complement values in the range of -1.0 ≤ value < 1.0, with the
PEAK
PEAK
2
2
2
2
2
, S1 , and Q1
-3
-3
-3
-3
PEAK
4
), 19 ( V1
( I2
),
Address: 27
PEAK
30
, I2
2
2
2
2
2
-4
-4
-4
-4
3
(S
PEAK
) and peak voltage, V1
PEAK
PULSE
AVG
2
2
2
2
2
-5
-5
-5
-5
2
) and Peak Voltage (V1
), 22 ( I2
, respectively. If the Ichan bit is “1”, these registers are driven from P2
),
31
2
2
2
2
2
-6
-6
-6
-6
1
PEAK
(Q
RMS
PULSE
2
2
2
2
GAIN
2
), 23 ( V2
-7
-7
-7
-7
0
and I1
)
PEAK
and T
.....
.....
.....
.....
.....
RMS
PEAK
( V2
OFF
( V2
PEAK
2
2
2
2
2
)
PEAK
-17
-17
-17
-10
-17
registers.
o
RMS
C), with the binary point to the right of bit 16.
PULSE,
, V2
) are the instantaneous current and voltage
2
2
2
2
and I2
2
-18
-18
-18
-11
-18
PEAK
S
RMS
PULSE,
2
2
2
2
2
)
-19
-19
-19
-12
-19
), These are two's complement
2
2
2
2
Q
2
-20
-20
-20
-13
-20
PULSE
2
2
2
2
2
-21
-21
-21
-14
-21
)
CS5464
2
2
2
2
2
-22
-22
-22
-15
-22
DS682F1
LSB
LSB
LSB
LSB
LSB
2
2
2
2
2
AVG
-23
-23
-23
-16
-23
,

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