CS8406-DZZR Cirrus Logic Inc, CS8406-DZZR Datasheet - Page 24

• Manufacturer Part Number: CS8406-DZZR
• Description: IC,Digital Audio Transmitter,CMOS,TSSOP,28PIN,PLASTIC
• Manufacturer: Cirrus Logic Inc

24
8.14
8.15
8.16
ID3
7
0
7
Note:
EFTCI - E to F C-data buffer transfer inhibit bit.
Default = ‘0’
0 - Allow C-data E to F buffer transfers
1 - Inhibit C-data E to F buffer transfers
CAM - C-data buffer control port access mode bit
Default = ‘0’
0 - One-Byte Mode
1 - Two-Byte Mode
User Data Buffer Control (13h)
UD - User bit data source specifier
Default = ‘0’
0 - U Pin is the source of transmitted U data
1 - U data buffer is the source of transmitted U data
UBM1:0 - Sets the operating mode of the AES3 User bit manager
Default = ‘00’
00 - Transmit all zeros mode
01 - Block Mode
10 - Reserved
11 - Reserved
EFTUI - E to F U-data buffer transfer inhibit bit (valid in Block Mode only).
Default = ‘0’
0 - Allow U-data E to F buffer transfers
1 - Inhibit U-data E to F buffer transfers
Channel Status Bit or User Bit Data Buffer (20h - 37h)
Either the channel status data buffer E or the separate user bit data buffer E (provided UBM bits are set to
Block Mode) is accessible through these register addresses.
CS8406 I.D. and Version Register (7Fh) (Read Only)
ID[3:0] - ID code for the CS8406. Permanently set to 1110
VER[3:0] = 0001 (revision A)
VER[3:0] = 0010 (revision B)
There are separate complete buffers for the Channel Status and User bits. This control bit deter-
mines which buffer appears in the address space.
ID2
6
0
6
ID1
5
0
5
ID0
UD
4
4
UBM1
VER3
3
3
UBM0
VER2
2
2
VER1
1
0
1
CS8406
EFTUI
DS580F4
VER0
0
0