CY62167EV30LL-45ZXA Cypress Semiconductor Corp, CY62167EV30LL-45ZXA Datasheet - Page 9

• Manufacturer Part Number: CY62167EV30LL-45ZXA
• Description: CY62167EV30LL-45ZXA
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62167EV30LL-45ZXA

• Format - Memory: RAM
• Memory Type: SRAM
• Memory Size: 16M (2M x 8 or 1M x 16)
• Speed: 45ns
• Interface: Parallel
• Voltage - Supply: 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP I
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Document #: 38-05446 Rev. *I
Notes
26. The internal write time of the memory is defined by the overlap of WE, CE
27. Data I/O is high impedance if OE = V
28. If CE
29. During this period the I/Os are in output state. Do not apply input signals.
write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must refer to the edge of the signal that terminates the write
ADDRESS
ADDRESS
BHE/BLE
BHE/BLE
1
DATA I/O
DATA I/O
goes HIGH and CE
CE
CE
CE
CE
WE
WE
OE
OE
1
2
1
2
NOTE 29
NOTE 29
2
goes LOW simultaneously with WE = V
(continued)
IH
.
Figure 8. Write Cycle No. 2 (CE
t
SA
t
t
Figure 7. Write Cycle No. 1 (WE Controlled)
HZOE
HZOE
t
SA
t
t
AW
AW
IH
, the output remains in a high impedance state.
t
SCE
1
= V
t
t
WC
WC
IL
, BHE or BLE or both = V
t
t
BW
1
BW
or CE
VALID DATA
VALID DATA
t
t
t
t
PWE
PWE
SD
SD
2
t
SCE
Controlled)
[26, 27, 28]
IL
, and CE
[26, 28]
2
t
t
HD
HD
CY62167EV30 MoBL
= V
t
t
HA
HA
IH
. All signals must be ACTIVE to initiate a
Page 9 of 16
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