CY7C025AV-25AC Cypress Semiconductor Corp, CY7C025AV-25AC Datasheet - Page 2

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CY7C025AV-25AC

Manufacturer Part Number
CY7C025AV-25AC
Description
IC,SRAM,8KX16,CMOS,QFP,100PIN,PLASTIC
Manufacturer
Cypress Semiconductor Corp
Datasheets

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Functional Description
The CY7C024AV/025AV/026AV and CY7C0241AV/0251AV /
036AV are low-power CMOS 4K, 8K, and 16K x16/18 dual-
port static RAMs. Various arbitration schemes are included on
the devices to handle situations when multiple processors ac-
cess the same piece of data. Two ports are provided, permit-
ting independent, asynchronous access for reads and writes
to any location in memory. The devices can be utilized as stan-
dalone 16/18-bit dual-port static RAMs or multiple devices can
be combined in order to function as a 32/36-bit or wider mas-
ter/slave dual-port static RAM. An M/S pin is provided for im-
plementing 32/36-bit or wider memory applications without the
need for separate master and slave devices or additional dis-
crete logic. Application areas include interprocessor/multipro-
cessor designs, communications status buffering, and dual-
port video/graphics memory.
Pin Configurations
Notes:
6.
7.
A
A
12L
12R
on the CY7C025AV.
on the CY7C025AV.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
GND
V
V
NC
NC
NC
NC
NC
NC
NC
NC
10L
11L
12L
13L
14L
15L
CC
CC
0R
1R
2R
3R
4R
5R
6R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
100 99
26
27 28
PRELIMINARY
98
97
29
96
30
CY7C024AV (4K x 16)
CY7C025AV (8K x 16)
95 94
31 32
93 92
33
34
91
100-Pin TQFP
35
90
36 37 38
Top View
89 88
2
87
39
Each port has independent control pins: Chip Enable (CE),
Read or Write Enable (R/W), and Output Enable (OE). Two
flags are provided on each port (BUSY and INT). BUSY sig-
nals that the port is trying to access the same location currently
being accessed by the other port. The Interrupt flag (INT) per-
mits communication between ports or systems by means of a
mail box. The semaphores are used to pass a flag, or token,
from one port to the other to indicate that a shared resource is
in use. The semaphore logic is comprised of eight shared
latches. Only one side can control the latch (semaphore) at
any time. Control of a semaphore indicates that a shared re-
source is in use. An automatic power-down feature is con-
trolled independently on each port by a Chip Select (CE) pin.
The CY7C024AV/025AV/026AV and CY7C0241AV/0251AV/
036AV are available in 100-pin Thin Quad Plastic Flatpacks
(TQFP).
86
40
85
41
84
42
83 82 81 80 79 78 77 76
43 44 45 46 47 48 49 50
CY7C0241AV/0251AV/036AV
CY7C024AV/025AV/026AV
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
A
A
A
A
NC
NC
NC
NC
NC
NC
NC
A
A
A
A
A
INT
BUSY
GND
M/S
BUSY
INT
A
A
NC
0L
2R
3R
4R
5L
4L
3L
2L
1L
0R
1R
L
R
L
R

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