CY7C1315BV18-250BZXC Cypress Semiconductor Corp, CY7C1315BV18-250BZXC Datasheet - Page 4

SRAM (Static RAM)

CY7C1315BV18-250BZXC

Manufacturer Part Number
CY7C1315BV18-250BZXC
Description
SRAM (Static RAM)
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1315BV18-250BZXC

Format - Memory
RAM
Memory Type
SRAM - Synchronous, QDR II
Memory Size
18M (512K x 36)
Speed
250MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
165-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1315BV18-250BZXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Part Number:
CY7C1315BV18-250BZXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Contents
Pin Configuration ............................................................. 5
Pin Definitions .................................................................. 7
Functional Overview ........................................................ 9
Application Example ...................................................... 11
Truth Table ...................................................................... 11
Write Cycle Descriptions ............................................... 12
Write Cycle Descriptions ............................................... 12
Write Cycle Descriptions ............................................... 13
IEEE 1149.1 Serial Boundary Scan (JTAG) .................. 14
TAP Controller State Diagram ....................................... 16
TAP Controller Block Diagram ...................................... 17
Document Number: 38-05620 Rev. *F
Read Operations ......................................................... 9
Write Operations ......................................................... 9
Byte Write Operations ................................................. 9
Single Clock Mode ...................................................... 9
Concurrent Transactions ........................................... 10
Depth Expansion ....................................................... 10
Programmable Impedance ........................................ 10
Echo Clocks .............................................................. 10
DLL ............................................................................ 10
Disabling the JTAG Feature ...................................... 14
Test Access Port—Test Clock ................................... 14
Test Mode Select (TMS) ........................................... 14
Test Data-In (TDI) ..................................................... 14
Test Data-Out (TDO) ................................................. 14
Performing a TAP Reset ........................................... 14
TAP Registers ........................................................... 14
TAP Instruction Set ................................................... 14
TAP Electrical Characteristics ...................................... 17
TAP AC Switching Characteristics ............................... 18
TAP Timing and Test Conditions .................................. 18
Identification Register Definitions ................................ 19
Scan Register Sizes ....................................................... 19
Instruction Codes ........................................................... 19
Boundary Scan Order .................................................... 20
Power Up Sequence in QDR-II SRAM ........................... 21
Maximum Ratings ........................................................... 22
Operating Range ............................................................ 22
Electrical Characteristics .............................................. 22
Capacitance .................................................................... 24
Thermal Resistance ....................................................... 24
Switching Characteristics ............................................. 25
Switching Waveforms .................................................... 27
Ordering Information ..................................................... 28
Package Diagram ........................................................... 29
Document History Page ................................................. 30
Sales, Solutions, and Legal Information ...................... 32
Power Up Sequence ................................................. 21
DLL Constraints ........................................................ 21
DC Electrical Characteristics ..................................... 22
AC Electrical Characteristics ..................................... 23
Ordering Code Definitions ......................................... 28
Worldwide Sales and Design Support ....................... 32
Products .................................................................... 32
PSoC Solutions ......................................................... 32
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