CY7C1380D-250AXC Cypress Semiconductor Corp, CY7C1380D-250AXC Datasheet - Page 16

• Manufacturer Part Number: CY7C1380D-250AXC
• Description: SRAM (Static RAM)
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1380D-250AXC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 18M (512K x 36)
• Speed: 250MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Density: 18Mb
• Access Time (max): 2.6ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 250MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 19b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 4
• Supply Current: 350mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Identification Register Definitions
Scan Register Sizes
Identification Codes
Note
Document #: 38-05543 Rev. *F
Revision Number (31:29)
Device Depth (28:24)
Device Width (23:18) 119-BGA
Device Width (23:18) 165-FBGA
Cypress Device ID (17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
Instruction
Bypass
ID
Boundary Scan Order (119-ball BGA package)
Boundary Scan Order (165-ball FBGA package)
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
13. Bit #24 is 1 in the register definitions for both 2.5v and 3.3v versions of this device.
Instruction
Instruction Field
Register Name
[13]
Code
000
001
010
100
101
011
110
111
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High-Z state.
Loads the ID register with the vendor ID code and places the register between TDI and TDO.
This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use. This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation.
Do Not Use. This instruction is reserved for future use.
Do Not Use. This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
CY7C1380D/CY7C1380F
00000110100
(512K x 36)
101000
000000
100101
01011
000
1
CY7C1382D/CY7C1382F
Bit Size (x36)
00000110100
(1 Mbit x 18)
32
85
89
3
1
101000
000000
010101
Description
01011
000
1
CY7C1380D, CY7C1382D
Defines the width and density.
Indicates the presence of an ID
CY7C1380F, CY7C1382F
Describes the version number.
Reserved for internal use.
Defines the memory type and
architecture.
Defines the memory type and
architecture.
Allows unique identification of
SRAM vendor.
register.
Bit Size (x18)
Description
32
85
89
3
1
Page 16 of 34
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