CY7C1470V33-167AXI Cypress Semiconductor Corp, CY7C1470V33-167AXI Datasheet - Page 31

• Manufacturer Part Number: CY7C1470V33-167AXI
• Description: CY7C1470V33-167AXI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1470V33-167AXI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 72M (2M x 36)
• Speed: 167MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Density: 72Mb
• Access Time (max): 3.4ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 167MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 21b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Number Of Ports: 4
• Supply Current: 450mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 2M
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document History Page
Document Number: 38-05289 Rev. *M
Document Title: CY7C1470V33/CY7C1472V33/CY7C1474V33, 72-Mbit (2 M × 36/4 M × 18/1 M × 72)
Pipelined SRAM with NoBL™ Architecture
Document Number: 38-05289
Revision
*C
*D
*G
*A
*B
*E
*F
**
114676
121520
223721
235012
243572
299511
323039
351937
ECN
Change
Orig. of
CJM
RYQ
PKS
NJY
NJY
SYT
VBL
PCI
PCI
Submission
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
08/06/02
01/27/03
Date
New Datasheet
Updated features for package offering
Removed 300 MHz offering
Changed tCO, tEOV, tCHZ, tEOHZ from 2.4 ns to 2.6 ns (250 MHz),
tDOH, tCLZ from 0.8 ns to 1.0 ns (250 MHz), tDOH, tCLZ from 1.0 ns
to 1.3 ns (200 MHz)
Updated ordering information
Changed Advanced Information to Preliminary
Changed timing diagrams
Changed logic block diagrams
Modified Functional Description
Modified “Functional Overview” section
Added boundary scan order for all packages
Included thermal numbers and capacitance values for all packages
Included IDD and ISB values
Removed 250 MHz offering and included 225 MHz speed bin
Changed package outline for 165FBGA package and 209-ball BGA package
Removed 119-BGA package offering
Minor Change: The data sheets do not match on the spec system and
external web
Changed ball C11,D11,E11,F11,G11 from DQPb,DQb,DQb,DQb,DQb to
DQPa,DQa,DQa,DQa,DQa in page 4
Modified capacitance values in page 20
Removed 225 MHz offering and included 250 MHz speed bin
Changed t
Changed Θ
TQFP Package on Page # 20
Added Pb-Free information for 100-Pin TQFP and 165 FBGA Packages
Added comment of ‘Pb-Free BG packages availability’ below the Ordering
Information
Add Industrial part numbers in Ordering Info section
Unshaded 250 MHz speed bin in the AC/DC Table and Selection Guide
Address expansion pins/balls in the pinouts for all packages are modified as
per JEDEC standard
Added Address Expansion pins in the Pin Definitions Table
Modified V
Changed package name from 209-ball PBGA to 209-ball FBGA on page# 5
Removed comment of ‘Pb-Free BG packages availability below the Ordering
Information
Updated Ordering Information Table
Changed from Preliminary to Final
Updated Ordering Information Table
CYC
OL
JA
, V
from 16.8 to 24.63 °C/W and Θ
from 4.4 ns to 4.0 ns for 250 MHz Speed Bin
OH
Test Conditions
Description of Change
JC
from 3.3 to 2.28 °C/W for 100
CY7C1470V33
CY7C1472V33
CY7C1474V33
Page 31 of 33
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