CY7C4261V-10JXC Cypress Semiconductor Corp, CY7C4261V-10JXC Datasheet - Page 16

• Manufacturer Part Number: CY7C4261V-10JXC
• Description: IC,FIFO,16KX9,SYNCHRONOUS,CMOS,LDCC,32PIN,PLASTIC
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4261V-10JXC

• Function: Synchronous
• Memory Size: 144K (16K x 9)
• Data Rate: 100MHz
• Access Time: 8ns
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Programmable Almost Full Flag Timing
Write Programmable Registers
Notes
Document #: 38-06013 Rev. *F
24. If a write is performed on this rising edge of the write clock, there will be Full  (m1) words of the FIFO when PAF goes LOW.
25. PAF offset = m.
26. 16 K m words for CY7C4261V, 32 K – m words for CY7C4271V, 64 K  m words for CY7C4281V, and 128 K  m words for CY4291V.
27. t
WEN2/LD
of RCLK and the rising edge of WCLK is less than t
SKEW2
(if applicable)
WCLK
WEN1
D
0
WEN2
–D
WCLK
REN1,
WEN1
RCLK
REN2
is the minimum time between a rising RCLK edge and a rising WCLK edge for PAF to change during that clock cycle. If the time between the rising edge
PAF
8
t
CLKH
t
CLKH
Full (M+1) Words
t
CLK
(continued)
t
t
ENS
ENS
t
DS
In FIFO
PAE Offset
t
t
ENS
ENS
LSB
SKEW2
t
t
ENH
ENH
t
CLKL
t
CLKL
, then PAF may not change state until the next WCLK.
t
ENH
t
DH
Note
PAE Offset
Note
MSB
24
25
t
PAF
t
ENS
PAF Offset
t
SKEW2
(Full - M) Words
LSB
In FIFO
t
ENS
[27]
CY7C4261V/CY7C4271V
CY7C4281V/CY7C4291V
t
[26]
ENH
PAF Offset
MSB
t
PAF
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