CY7C64013C-SXCT Cypress Semiconductor Corp, CY7C64013C-SXCT Datasheet - Page 39

• Manufacturer Part Number: CY7C64013C-SXCT
• Description: IC,MICROCONTROLLER,8-BIT,SOP,28PIN,PLASTIC
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C64013C-SXCT

• Applications: USB Microcontroller
• Core Processor: M8C
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C640xx
• Ram Size: 256 x 8
• Interface: I²C, USB, HAPI
• Number Of I /o: 19
• Voltage - Supply: 4 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: CY7C64xx
• Core: M8C
• Data Bus Width: 8 bit
• Program Memory Size: 8 KB
• Data Ram Size: 256 B
• Interface Type: HAPI, I2C
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3654, CY3654-P03
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-1339 - KIT LOW SPEED PERSONALITY BOARD
• Lead Free Status / Rohs Status: Details

Document Number: 38-08001 Rev. *D
Table 39. Details of Modes for Differing Traffic Conditions (see
Status In/extra Out
0
0
0
0
CONTROL READ
Properties of Incoming Packet
Mode Bits
Normal In/premature status Out
1
1
1
1
1
1
Nak In/premature status Out
1
1
1
1
1
1
Status Out/extra In
0
0
0
0
0
0
OUT ENDPOINT
Properties of Incoming Packet
Mode Bits
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
Out
Out
Out
In
token
Out
Out
Out
Out
Out
In
Out
Out
Out
Out
Out
In
Out
Out
Out
Out
Out
In
token
<= 10
> 10
x
x
count
2
2
!=2
> 10
x
x
2
2
!=2
> 10
x
x
2
2
!=2
> 10
x
x
count
buffer
buffer
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
dval
dval
valid
x
invalid
x
valid
valid
valid
x
invalid
x
valid
valid
valid
x
invalid
x
valid
valid
valid
x
invalid
x
DTOG
DTOG
UC
UC
UC
UC
Changes made by SIE to Internal Registers and Mode Bits
1
0
updates 1
UC
UC
UC
1
0
updates 1
UC
UC
UC
1
0
updates 1
UC
UC
UC
Changes made by SIE to Internal Registers and Mode Bits
Table 38
DVAL
DVAL
UC
UC
UC
UC
1
1
UC
UC
UC
1
1
UC
UC
UC
1
1
UC
UC
UC
for the decode legend) (continued)
UC
UC
UC
UC
COUNT Setup
updates UC
updates UC
updates UC
UC
UC
UC
updates UC
updates UC
updates UC
UC
UC
UC
updates UC
updates UC
updates UC
UC
UC
UC
COUNT Setup
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
UC
1
In
UC
UC
UC
UC
UC
1
UC
UC
UC
UC
UC
1
UC
UC
UC
UC
1
1
In
1
UC
UC
UC
Out
1
1
1
UC
UC
UC
1
1
1
UC
UC
UC
1
1
1
UC
UC
UC
Out
UC
UC
UC
1
ACK
1
UC
UC
UC
UC
1
1
UC
UC
UC
UC
UC
1
UC
UC
UC
UC
UC
ACK
0 0 1 1 Stall
NoChange
NoChange
NoChange
Mode Bits
NoChange
0 0 1 1 Stall
0 0 1 1 Stall
NoChange
NoChange
1 1 1 0 ACK (back)
NoChange
0 0 1 1 Stall
0 0 1 1 Stall
NoChange
NoChange
NoChange
NoChange
0 0 1 1 Stall
0 0 1 1 Stall
NoChange
NoChange
0 0 1 1 Stall
Mode Bits
ACK
ACK
ACK
ignore
ignore
TX 0
Response
ignore
ignore
ignore
ignore
NAK
ignore
ignore
Response
CY7C64013C
CY7C64113C
Page 39 of 53
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
no
no
yes
Intr
no
no
yes
no
no
no
no
yes
Intr
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