DSPIC33FJ128GP204-E/ML Microchip Technology, DSPIC33FJ128GP204-E/ML Datasheet - Page 233
![16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ128GP204-E/ML
Manufacturer Part Number
DSPIC33FJ128GP204-E/ML
Description
16-bit DSC, 128KB Flash,DMA,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ128GP204-E/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128GP204-E/ML
Manufacturer:
Microchip Technology
Quantity:
135
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REGISTER 19-11: CiFEN1: ECAN™ ACCEPTANCE FILTER ENABLE REGISTER
REGISTER 19-12: CiBUFPNT1: ECAN™ FILTER 0-3 BUFFER POINTER REGISTER
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
FLTEN15
FLTEN7
R/W-1
R/W-1
R/W-0
R/W-0
FLTENn: Enable Filter n to Accept Messages bits
1 = Enable Filter n
0 = Disable Filter n
F3BP<3:0>: RX Buffer mask for Filter 3
1111 = Filter hits received in RX FIFO buffer
1110 = Filter hits received in RX Buffer 14
•
•
•
0001 = Filter hits received in RX Buffer 1
0000 = Filter hits received in RX Buffer 0
F2BP<3:0>: RX Buffer mask for Filter 2 (same values as bit 15-12)
F1BP<3:0>: RX Buffer mask for Filter 1 (same values as bit 15-12)
F0BP<3:0>: RX Buffer mask for Filter 0 (same values as bit 15-12)
FLTEN14
FLTEN6
R/W-1
R/W-1
R/W-0
R/W-0
F3BP<3:0>
F1BP<3:0>
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
FLTEN13
FLTEN5
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN12
FLTEN4
R/W-1
R/W-1
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FLTEN11
FLTEN3
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN10
FLTEN2
R/W-1
R/W-1
R/W-0
R/W-0
F2BP<3:0>
F0BP<3:0>
x = Bit is unknown
x = Bit is unknown
FLTEN9
FLTEN1
R/W-1
R/W-1
R/W-0
R/W-0
DS70292E-page 233
FLTEN8
FLTEN0
R/W-1
R/W-1
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0
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