DSPIC33FJ16GS502-E/SO Microchip Technology, DSPIC33FJ16GS502-E/SO Datasheet - Page 24
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DSPIC33FJ16GS502-E/SO
Manufacturer Part Number
DSPIC33FJ16GS502-E/SO
Description
16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
2.DSPIC33FJ06GS101-ISO.pdf
(18 pages)
3.DSPIC33FJ06GS101-ISO.pdf
(16 pages)
Specifications of DSPIC33FJ16GS502-E/SO
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ16GS502-E/SO
Manufacturer:
Johanson
Quantity:
40 000
- DSPIC33FJ06GS101-ISO PDF datasheet
- DSPIC33FJ06GS101-ISO PDF datasheet #2
- DSPIC33FJ06GS101-ISO PDF datasheet #3
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- Download datasheet (6Mb)
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
2.7
If the PLL of the target device is enabled and
configured for the device start-up oscillator, the
maximum oscillator source frequency must be limited
to 4 MHz < F
start-up conditions. This means that if the external
oscillator frequency is outside this range, the
application must start up in the FRC mode first. The
default PLL settings after a POR with an oscillator
frequency outside this range will violate the device
operating speed.
Once the device powers up, the application firmware
can initialize the PLL SFRs, CLKDIV, and PLLDBF to a
suitable value, and then perform a clock switch to the
Oscillator + PLL clock source. Note that clock switching
must be enabled in the device Configuration word.
2.8
If MPLAB ICD 2, ICD 3 or REAL ICE is selected as a
debugger, it automatically initializes all of the A/D input
pins (ANx) as “digital” pins, by setting all bits in the
ADPCFG register.
The bits in the registers that correspond to the A/D pins
that are initialized by MPLAB ICD 2, ICD 3, or REAL
ICE, must not be cleared by the user application firm-
ware; otherwise, communication errors will result
between the debugger and the device.
DS70318D-page 22
Oscillator Value Conditions on
Device Start-up
Configuration of Analog and
Digital Pins During ICSP
Operations
IN
< 8 MHz to comply with device PLL
Preliminary
If your application needs to use certain A/D pins as
analog input pins during the debug session, the user
application must clear the corresponding bits in the
ADPCFG register during initialization of the ADC mod-
ule.
When MPLAB ICD 2, ICD 3, or REAL ICE is used as a
programmer, the user application firmware must
correctly configure the ADPCFG register. Automatic
initialization of these registers is only done during
debugger operation. Failure to correctly configure the
register(s) will result in all A/D pins being recognized as
analog input pins, resulting in the port value being read
as a logic '0', which may affect user application func-
tionality.
2.9
Unused I/O pins should be configured as outputs and
driven to a logic-low state.
Alternatively, connect a 1k to 10k resistor to V
unused pins and drive the output to logic low.
2.10
Examples of typical application connections are shown
in Figure 2-4 through Figure 2-11.
Unused I/Os
Typical Application Connection
Examples
© 2009 Microchip Technology Inc.
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