DSPIC33FJ16MC102-E/SS Microchip Technology, DSPIC33FJ16MC102-E/SS Datasheet - Page 197
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DSPIC33FJ16MC102-E/SS
Manufacturer Part Number
DSPIC33FJ16MC102-E/SS
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SSOP .209in TUB
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ16GP101-IP.pdf
(322 pages)
Specifications of DSPIC33FJ16MC102-E/SS
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 125 C
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
21
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Details
- Current page: 197 of 322
- Download datasheet (5Mb)
REGISTER 19-4:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10-9
bit 8
bit 7-3
bit 2-1
bit 0
dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
U-0
U-0
—
—
Unimplemented: Read as ‘0’
CH123NB<1:0>: Channel 1, 2, 3 Negative Input Select for Sample B bits
11 = Reserved
10 = Reserved
0x = CH1, CH2, CH3 negative input is AVss
CH123SB: Channel 1, 2, 3 Positive Input Select for Sample B bit
dsPIC33FJ16GP101 and dsPIC33FJ16MC101 devices only:
1 = CH1 positive input is AN3, CH2 and CH3 positive inputs are not connected
0 = CH1 positive input is AN0, CH2 positive input is AN1, CH3 positive input is AN2
dsPIC33FJ16GP102 and dsPIC33FJ16MC102 devices only:
1 = CH1 positive input is AN3, CH2 positive input is AN4, CH3 positive input is AN5
0 = CH1 positive input is AN0, CH2 positive input is AN1, CH3 positive input is AN2
Unimplemented: Read as ‘0’
CH123NA<1:0>: Channel 1, 2, 3 Negative Input Select for Sample A bits
11 = Reserved
10 = Reserved
0x = CH1, CH2, CH3 negative input is AVss
CH123SA: Channel 1, 2, 3 Positive Input Select for Sample A bit
dsPIC33FJ16GP101 and dsPIC33FJ16MC101 devices only:
1 = CH1 positive input is AN3, CH2 and CH3 positive inputs are not connected
0 = CH1 positive input is AN0, CH2 positive input is AN1, CH3 positive input is AN2
dsPIC33FJ16GP102 and dsPIC33FJ16MC102 devices only:
1 = CH1 positive input is AN3, CH2 positive input is AN4, CH3 positive input is AN5
0 = CH1 positive input is AN0, CH2 positive input is AN1, CH3 positive input is AN2
U-0
U-0
—
—
AD1CHS123: ADC1 INPUT CHANNEL 1, 2, 3 SELECT REGISTER
‘1’ = Bit is set
W = Writable bit
U-0
U-0
—
—
Preliminary
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
R/W-0
R/W-0
CH123NB<1:0>
CH123NA<1:0>
x = Bit is unknown
R/W-0
R/W-0
DS70652C-page 197
CH123SB
CH123SA
R/W-0
R/W-0
bit 8
bit 0
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