DSPIC33FJ64MC710A-I/PT Microchip Technology, DSPIC33FJ64MC710A-I/PT Datasheet - Page 342
![16 Bit MCU/DSP 40MIPS 64KB FLASH 100 TQFP 12x12x1mm TRAY](/photos/12/13/121330/c04-100-tqfp_sml.jpg)
DSPIC33FJ64MC710A-I/PT
Manufacturer Part Number
DSPIC33FJ64MC710A-I/PT
Description
16 Bit MCU/DSP 40MIPS 64KB FLASH 100 TQFP 12x12x1mm TRAY
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64MC710A-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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dsPIC33FJXXXMCX06A/X08A/X10A
APPENDIX B:
Revision A (May 2009)
This is the initial release of this document.
Revision B (October 2009)
The revision includes the following global update:
• Added Note 2 to the shaded table that appears at
This revision also includes minor typographical and
formatting changes throughout the data sheet text.
All other major changes are referenced by their
respective section in the following table.
TABLE B-1:
DS70594B-page 342
“High-Performance, 16-Bit Digital Signal
Controllers”
Section 11.0 “I/O Ports”
Section 20.0 “Universal Asynchronous
Receiver Transmitter (UART)”
Section 22.0 “10-bit/12-bit Analog-to-Digital
Converter (ADC)”
Section 23.0 “Special Features”
Section 26.0 “Electrical Characteristics”
Section 27.0 “High Temperature Electrical
Characteristics”
“Product Identification System”
the beginning of each chapter. This new note
provides information regarding the availability of
registers and their associated bits.
Section Name
MAJOR SECTION UPDATES
REVISION HISTORY
Added information on high temperature operation (see “Operating
Range:”).
Changed the reference to digital-only pins to 5V tolerant pins in the
second paragraph of Section 11.2 “Open-Drain Configuration”.
Updated the two baud rate range features to: 10 Mbps to 38 bps at
40 MIPS.
Updated the ADCx block diagram (see Figure 22-1).
Updated the second paragraph and removed the fourth paragraph in
Section 23.1 “Configuration Bits”.
Updated the Device Configuration Register Map (see Table 23-1).
Updated the Absolute Maximum Ratings for high temperature and
added Note 4.
Updated Power-Down Current parameters DC60d, DC60a, DC60b,
and DC60d (see Table 26-7).
Added I2Cx Bus Data Timing Requirements (Master Mode)
parameter IM51 (see Table 26-36).
Updated the SPIx Module Slave Mode (CKE = 1) Timing
Characteristics (see Figure 26-17).
Updated the Internal LPRC Accuracy parameters (see Table 26-19).
Updated the ADC Module Specifications (12-bit Mode) parameters
AD23a, AD24a, AD23b, and AD24b (see Table 26-42).
Updated the ADC Module Specifications (10-bit Mode) parameters
AD23c, AD24c, AD23d, and AD24d (see Table 26-42).
Added new chapter with high temperature specifications.
Added the “H” definition for high temperature.
Preliminary
Update Description
2009 Microchip Technology Inc.
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