JM38510/11201BDA National Semiconductor, JM38510/11201BDA Datasheet - Page 8
![FULL JAN QUAL (LM139W)](/photos/31/33/313308/14pin_cpak_sml.jpg)
JM38510/11201BDA
Manufacturer Part Number
JM38510/11201BDA
Description
FULL JAN QUAL (LM139W)
Manufacturer
National Semiconductor
Datasheet
1.JM3851011201BDA.pdf
(20 pages)
Specifications of JM38510/11201BDA
Number Of Elements
4
Output Type
Open Collector
Technology
Bipolar
Input Offset Voltage
5mV
Single Supply Voltage (typ)
9/12/15/18/24/28V
Dual Supply Voltage (typ)
±3/±5/±9/±12/±15V
Supply Current (max)
2@5VmA
Power Supply Requirement
Single/Dual
Common Mode Rejection Ratio
70dB
Voltage Gain In Db
93.98dB
Single Supply Voltage (min)
5V
Single Supply Voltage (max)
36V
Dual Supply Voltage (min)
±2.5V
Dual Supply Voltage (max)
±18V
Power Dissipation
350mW
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
14
Package Type
CPAK
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Driving CMOS
Application Hints
The LM139 is a high gain, wide bandwidth device which, like
most comparators, can easily oscillate if the output lead is
inadvertently allowed to capacitively couple to the inputs via
stray capacitance. This shows up only during the output volt-
age transition intervals as the comparator changes states.
Power supply bypassing is not required to solve this problem.
Standard PC board layout is helpful as it reduces stray input-
output coupling. Reducing the input resistors to < 10 kΩ
reduces the feedback signal levels and finally, adding even a
small amount (1 to 10 mV) of positive feedback (hysteresis)
20129504
causes such a rapid transition that oscillations due to stray
Driving TTL
feedback are not possible. Simply socketing the IC and at-
taching resistors to the pins will cause input-output oscilla-
tions during the small transition intervals unless hysteresis is
used. If the input signal is a pulse waveform, with relatively
fast rise and fall times, hysteresis is not required.
All pins of any unused comparators should be tied to the neg-
ative supply.
The bias network of the LM139 establishes a drain current
which is independent of the magnitude of the power supply
voltage over the range of from 5 V
to 30 V
.
DC
DC
It is usually unnecessary to use a bypass capacitor across the
20129505
power supply line.
AND Gate
The differential input voltage may be larger than V
+
without
damaging the device. Protection should be provided to pre-
vent the input voltages from going negative more than −0.3
V
(at 25°C). An input clamp diode can be used as shown
DC
in the applications section.
The output of the LM139 is the uncommitted collector of a
grounded-emitter NPN output transistor. Many collectors can
be tied together to provide an output OR'ing function. An out-
put pull-up resistor can be connected to any available power
supply voltage within the permitted supply voltage range and
there is no restriction on this voltage due to the magnitude of
the voltage which is applied to the V
+
terminal of the LM139
package. The output can also be used as a simple SPST
switch to ground (when a pull-up resistor is not used). The
amount of current which the output device can sink is limited
) and the β
by the drive available (which is independent of V
+
of this device. When the maximum current limit is reached
(approximately 16 mA), the output transistor will come out of
20129508
saturation and the output voltage will rise very rapidly. The
OR Gate
output saturation voltage is limited by the approximately
60Ω R
of the output transistor. The low offset voltage of
SAT
the output transistor (1 mV) allows the output to clamp es-
sentially to ground level for small load currents.
Typical Applications
(V
+
= 5.0 V
)
DC
Basic Comparator
20129509
20129503
www.national.com
8