KSZ8841-PMQL Micrel Inc, KSZ8841-PMQL Datasheet

Single Ethernet Port + 32-bit/33MHz PCI Interface( )

KSZ8841-PMQL

Manufacturer Part Number
KSZ8841-PMQL
Description
Single Ethernet Port + 32-bit/33MHz PCI Interface( )
Manufacturer
Micrel Inc

Specifications of KSZ8841-PMQL

Controller Type
Ethernet Controller, MAC
Interface
Bus
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1633 - BOARD EVALUATION KSZ8841-PMQL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-2117
KSZ8841-PMQL

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8841-PMQL
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8841-PMQLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8841-PMQLI
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Introduction
The KSZ8841-PMQL supports Wake-on-LAN (WoL) and Wake-
Up power management event functions. These features enable
the system to return to a normal operating state when a WoL or a
wake event occurs. This application note describes the Wake-on-
LAN and Wake-up Event of the Power Management operation on
the KSZ8841-PMQL.
Datasheets and support documentation can be found on Micrel’s
web site at: www.micrel.com.
Term Definitions
• Power Management: A specification that defines power-
• Wake Event: An event that causes a device in Power
• PME Enable (PME_Enable): Bit 8 of the Power
• Wake-on-LAN Mode: A device is in Wake-on-LAN (WoL)
• PMEN (pin14): This pin is similar in function to a system
• PME Status (PME_Status) -bit 15 of CPMC: When 1,
• Magic Packet: A specific packet of information sent to
Wake-on-LAN
There are two parts involved to support Wake-on-LAN. The first
part is the Wake-Up Frame detection and the second part is
Magic Packet frame detection.
Magic Packet is a trademark of Advanced Mirco Devices, Inc.
May 2007
saving states of devices and systems. A spec-compliant
device implements registers to control and report status for
its Power Management function.
Management mode to signal the system.
Management Control and Status Register CPMC. Setting
this bit to 1 allows the device to assert the PMEN pin when
it detects a wake event.
mode if it is programmed to enable the receipt of Wake-Up
Frame or Magic Packet™ frame other than the fully
operational state and is allowed to signal a wake event to
the system by Ethernet frame.
interrupt (INTRN pin). When asserted, it signals the
system that a wake event has occurred.
indicates the device detected a wake event. If PME
Enable is also set to 1, then the device will assert PMEN
whenever the device meets a wake-up condition.
Software can writes a 1 to this bit to clear it.
remotely wake up a sleeping or powered off PC on a
network, it is handled by the LAN controller.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
Wake-Up Frame Detection
The Wake-Up Frame detection can be enabled by the following
procedure:
• Set the Wake-Up Frame bit [0-3] in the Wake-Up Frame
• Before putting the MAC into the Wake-Up Frame detection
• The MAC supports four programmable Wake-Up Frames that
• In order to determine which bytes of the frames should be
• The byte mask is a 64-bit field that corresponds to the first
• When the PME Enable bit and WFCR register bit [3-0] are set,
408
Power Management in the KSZ8841-PMQL
Control and Status Register WFCR. Place the KSZ8841-
PMQL into the Wake-Up Frame detection mode. In this mode,
normal data receiving is disabled, and detection logic within the
MAC examines receive data for the pre-programmed Wake-
Up Frame patterns is enabled.
state, the host must provide the detection logic with a list of
sample frames and their corresponding byte masks. This
information is written into the Wake-Up Frame 0-3 Byte Mask
Registers (offset 0x0220-0x025A). These are set of registers
for Wake-Up Frame detection.
can support many different receive packet patterns. If the
Wake-Up Frame bit [0-3] in WFCR register is enabled, the
Wake-Up Frame function receives all frames addressed to the
MAC. It then checks each incoming frame against the enabled
Wake-Up Frame mask register and recognizes the frame as a
remote Wake-Up Frame to see if it matches the value of the
Wake-Up Frame CRC Register to be pre-programmed based
on the mask bytes of the Wake-Up Frame Mask Registers.
checked by the CRC module, the MAC uses a programmable
byte mask for each of the Wake-Up Frames.
64Bytes of a Wake-Up Frame. The KSZ8841-PMQL supports
up to 4 Wake-Up Frames by setting WFCR register bit [3-0].
incoming frames are filtered based on the settings in Wake-Up
Frame 0-3 CRC Register and Wake-Up Frame 0-3 Byte Mask
Register. In other words, a frame must pass filters in order to
be received. This is a desirable feature in WoL mode since it
prevents the non-wake frames from filling the receive FIFO.
However, it is not desirable in normal operating mode, since it
will not allow non-wake frames from being received. Therefore,
the driver should ensure that the PME Enable bit is set to 0
and WFCR register bit [3-0] are reset for normal operation. In
Wake-Up Frame mode, the host software also needs to set
Wake-Up Frame 0-3 CRC Register and Wake-Up Frame 0-3
Byte Mask Register first. In Table 1, shows the Wake-Up
Frame register's structure.
) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
Wake-on-LAN and Wake-Up Event of
AN-142
M9999-050807-A

Related parts for KSZ8841-PMQL

KSZ8841-PMQL Summary of contents

Page 1

... Wake-Up Frames. • The byte mask is a 64-bit field that corresponds to the first 64Bytes of a Wake-Up Frame. The KSZ8841-PMQL supports Wake-Up Frames by setting WFCR register bit [3-0]. • When the PME Enable bit and WFCR register bit [3-0] are set, ...

Page 2

Micrel, Inc. CRC and Byte Mask Registers for Wake-Up Frame 0 bit31 Wake-Up Frame 0 CRC 1 Register (0x0222) WF0CRC1 bit31 Wake-Up Frame 0 Byte Mask 1 Register (0x0226) WF0BM1 bit63 Wake-Up Frame 0 Byte Mask 3 Register (0x022A) WF0BM3 ...

Page 3

... Micrel, Inc. How to Set Wake-Up Frame The KSZ8841-PMQL supports up to four Wake-Up Frames. Each Wake-Up Frame can be defined by the user. Initially, the user needs to know the Wake-Up Frame pattern that they are planning to use. The user can mask or select first 64bytes of the Wake-Up Frame by Wake-Up Frame Mask Register. Each bit of the mask register corresponds to each byte of the Wake-Up Frame ...

Page 4

... If the LAN controller scans a frame and does not find the specific sequence shown above, it discards the frame and takes no further action. If the KSZ8841-PMQL detects this sort of the data sequence, then it can assert the PMEN pin to wake up the system by the Magic Packet. ...

Page 5

... KSZ8841-PMQL power state. The value of this bit is loaded from the PME_D2 bit in the EEPROM 0x6 word. If this bit is set, the KSZ8841-PMQL asserts PME event (PMEN pin 14) when the KSZ8841-PMQL power state and PME_EN (see bit8 in PMCS register) is set. Otherwise, the KSZ8841PMQL does not assert PME event (PMEN pin 14) when the KSZ8841PMQL power state ...

Page 6

... Disable PME_Enable in CPMC register set Power State bits [1- state in CPMC register. May 2007 If this bit is set, it indicates that the KSZ8841-PMQL support D1 power state. The value of this bit loaded from the D1_SUP bit in the EEPROM 0x6 word. (This bit is 0 only if without EEPROM). ...

Page 7

... Micrel, Inc. Conclusion Since the KSZ8841-PMQL Ethernet controller supports the functions for Wake-on-LAN and Wake Event of the power management, the user can use any kind of Magic Packet frame or Wake-Up Frames to apply for remote control and wake-up by Ethernet network and Ethernet packet. With applications in industrial and consumer domain, the KSZ8841- PMQL Ethernet controller provides these methods to meet these kinds of control demand ...

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