KSZ8842-PMBL AM Micrel Inc, KSZ8842-PMBL AM Datasheet - Page 45

• Manufacturer Part Number: KSZ8842-PMBL AM
• Description: 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-PMBL AM

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1636 - BOARD EVALUATION KSZ8842-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3348

Micrel, Inc.
MAC DMA Transmit Start Command Register (MDTSC Offset 0x0008)
This register is written by the CPU when packets in the data buffer need to be transmitted.
The following table shows the register bit fields.
October 2007
31 – 0
8 – 7
Bit
9
6
5
4
3
2
1
0
0x00000000
Default
00
0
0
0
0
0
0
0
0
RW
RW
RW
RW
RW
RW
RW
RW
RO
R/W
WO
MRFCE MAC Receive Flow Control Enable
When set, flow control is enabled. The KSZ8842-PMQL/PMBL will
acknowledge a PAUSE frame from the switch, the outgoing packets will be
pending in the transmit buffer until the PAUSE control timer expires.
When this bit is cleared, no flow control is enabled.
Note: KSZ8842-PMQL/PMBL is full duplex only for RX/TX buffer.
Reserved
MRB MAC Receive Broadcast
When set, the MAC receive all broadcast frames.
MRM MAC Receive Multicast
When set, the MAC receive all multicast frames (including broadcast).
MRU MAC Receive Unicast
When set, the MRU MAC receive unicast frames that match the 16 48-bit
MAC additional Station Address and the MAC address register if they are set
by user.
MRE MAC DMA Receive Error Frame
When set, the KSZ8842-PMQL/PMBL will pass the errors frames received to
the host.
Error frames include runt frames, oversized frames, CRC errors.
MRA MAC DMA Receive All
When set, the KSZ8842-PMQL/PMBL will receive all incoming frames,
regardless of its destination address.
DMA Receive Multicast Hash-Table Enable
When set, the RX function to receive multicast frames that pass the CRC
Hash filtering mechanism.
MRE MAC DMA RX Enable
When set, the DMA RX block is enabled and placed in a running state. When
reset, the receive process is placed in the stopped state after completing the
reception of the current frame.
The stop transmission command is effective only when the reception process
is in the running state.
Description
WTSC Transmit Start Command
When written with any value, the Transmit DMA checks for frames to be
transmitted. If no descriptor is available, the transmit process returns to
suspended state. If descriptiors are available, the transmit process starts or
resumes.
This bit is self-clearing.
45
KSZ8842-PMQL/PMBL
M9999-100207-1.5