KSZ8842-PMBL AM Micrel Inc, KSZ8842-PMBL AM Datasheet - Page 47

• Manufacturer Part Number: KSZ8842-PMBL AM
• Description: 2-Port Ethernet Switch/Repeater + 32-bit/33MHz PCI Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8842-PMBL AM

• Controller Type: Ethernet Switch Controller
• Interface: PCI
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LFBGA
• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-1636 - BOARD EVALUATION KSZ8842-PMQL
• Current - Supply: -
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant
• Other names: 576-3348

Micrel, Inc.
The following table shows the register bit fields.
MAC Multicast Table 1 Register (MTR1 Offset 0x0024)
The 64 bit multicast table is used for group address filtering. The hash value is defined as the six most significant bits of
the CRC of the DA. The two most significant bits select the register to be used, while the other determines the bit within
the register.
The following table shows the register bit fields.
Interrupt Enable Register (INTEN Offset 0x0028)
This register enables the interrupts from the internal or external sources.
The following table shows the register bit fields.
October 2007
31 – 0
31-0
Bit
Bit
Bit
31
30
29
28
27
26
Default
Default
Default
0x0
0x0
0
0
0
0
0
0
R/W
RW
RW
RW
RW
RW
RW
R/W
R/W
RW
RW
Description
MTR0 Multicast Table 0
When appropriate bit is set, the packet received with DA matches the
CRC hashing function is received without being filtered.
Note: when the receive all (RXRA) or receive multicast (RXRM) bit is set
in the RXCR then all multicast addresses are received regardless of the
multicast table value..
Description
MTR0 Multicast Table 1
When appropriate bit is set, the packet received with DA matches the
CRC hashing function is received without being filtered.
Note: when the receive all (RXRA) or receive multicast (RXRM) bit is set
in the RXCR then all multicast addresses are received regardless of the
multicast table value.
Description
DMLCIE DMA MAC Link Changed Interrupt Enable
When this bit is set, the DMA MAC Link Changed Interrupt is enabled.
When this bit is reset, the DMA MAC Link Changed Interrupt is disabled.
DMTIE DMA MAC Transmit Interrupt Enable
When this bit is set, the DMA MAC Transmit Interrupt is enabled.
When this bit is reset, the DMA MAC Transmit Interrupt is disabled.
DMRIE DMA MAC Receive Interrupt Enable
When this bit is set, the DMA MAC Receive Interrupt is enabled.
When this bit is reset, the DMA MAC Receive Interrupt is disabled.
DMTBUIE DMA MAC Transmit Buffer Unavailable Interrupt Enable
When this bit is set, the DMA MAC Transmit Buffer Unavailable Interrupt
is enabled.
When this bit is reset, the DMA MAC Transmit Buffer Unavailable Interrupt
is disabled.
DMRBUIE DMA MAC Receive Buffer Unavailable Interrupt Enable
When this bit is set, the DMA MAC Receive Buffer Unavailable Interrupt is
enabled.
When this bit is reset, the DMA MAC Receive Buffer Unavailable Interrupt
is disabled.
DMTPSIE DMA MAC Transmit Process Stopped Interrupt Enable
When this bit is set, the DMA MAC Transmit Process Stopped Interrupt is
enabled.
When this bit is reset, the DMA MAC Transmit Process Stopped Interrupt
is disabled.
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KSZ8842-PMQL/PMBL
M9999-100207-1.5