KSZ8997 Micrel Inc, KSZ8997 Datasheet
KSZ8997
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KSZ8997 Summary of contents
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... Functional Diagram Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com February 2007 KS8997/KSZ8997 8-Port 10/100 Integrated Switch with PHY and Frame Buffer On the media side, the KS8997 supports 10BaseT and 100BaseTX through auto-negotiation as specified by the IEEE 802 ...
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... Half-duplex back pressure flow control • Comprehensive LED support • Supports MDI/MDI-X auto crossover • Commercial temperature range: 0°C to +70°C • Supports lead free product (KSZ8997) for commercial temperature range: 0°C to +70°C • Available in 128-pin PQFP package February 2007 Applications • ...
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Revision History Revision Date Summary of Changes 1.00 11/27/00 Document origination. 1.01 04/02/01 Update maximum frame size. Update EEPROM priority descriptions. Update I/O descriptions. Update Electrical Characteristics. 1.02 05/11/01 Add MDI/MDI_X description/ 1.03 06/22/01 Change electrical requirements. 1.04 06/25/01 Correct ...
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Contents System Level Applications ................................................................................................................................................6 Pin Description ..................................................................................................................................................................7 I/O Grouping....................................................................................................................................................................11 I/O Descriptions...............................................................................................................................................................11 Pin Configuration.............................................................................................................................................................14 Functional Overview: Physical Layer Transceiver ..........................................................................................................15 100BaseTX Transmit...................................................................................................................................................15 100BaseTX Receive....................................................................................................................................................15 PLL Clock Synthesizer ................................................................................................................................................15 Scrambler/De-Scrambler (100BaseTX only)...............................................................................................................15 10BaseT Transmit .......................................................................................................................................................15 10BaseT Receive ........................................................................................................................................................15 Power Management ....................................................................................................................................................15 ...
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Priority Classification Control – 802.1p tag field..........................................................................................................21 Port 1 Control Register................................................................................................................................................22 Port 2 Control Register................................................................................................................................................22 Port 3 Control Register................................................................................................................................................22 Port 4 Control Register................................................................................................................................................23 Port 5 Control Register................................................................................................................................................23 Port 6 Control Register................................................................................................................................................23 Port 7 Control Register................................................................................................................................................24 Port 8 Control Register................................................................................................................................................24 Reserved ...
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System Level Applications The KS8997 can be configured to fit in an eight port 10/100 application. The major benefits of using the KS8997 are the lower power consumption, February 2007 unmanaged operation, flexible configuration, built in frame buffering, VLAN abilities ...
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Pin Description Pin Number Pin Name Type(1) 1 VDD_RX Pwr 2 GND_RX Gnd 3 GND_RX Gnd 4 VDD_RX Pwr 5 RXP[ RXM[ GND-ISO Gnd 8 TXP[ TXM[ GND_TX Gnd 11 VDD_TX Pwr ...
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Pin Number Pin Name Type(1) 39 GND-ISO Gnd 40 RXP[ RXM[ GND_TX Gnd 43 TXP[ TXM[ VDD_TX Pwr 46 VDD_TX Pwr 47 TXP[ TXM[ GND_TX Gnd 50 RXP[8] ...
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Pin Number Pin Name Type(1) 78 GND Gnd 79 LED[3][3] I/O 80 LED[3][2] I/O 81 LED[3][0] I/O 82 LED[4][3] I/O 83 LED[4][2] I/O 84 LED[4][0] I/O 85 VDD Pwr 86 GND Gnd 87 LED[5][3] I/O 88 LED[5][2] I/O 89 LED[5][0] ...
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Pin Number Pin Name Type(1) 117 RXM[1] I 118 GND_TX Gnd 119 TXP[1] O 120 TXM[1] O 121 VDD_TX Pwr 122 VDD_TX Pwr 123 TXP[2] O 124 TXM[2] O 125 GND_TX Gnd 126 RXP[2] I 127 RXM[2] I 128 GND-ISO ...
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I/O Grouping Group Name Description PHY Physical interface IND LED Indicators UP Unmanaged Programmable CTRL Control and Miscellaneous TEST Test (Factory) PWR/GND Power and Ground I/O Descriptions Group I/O Names Active Status PHY RXP[1:8] RXM[1:8] IND TXP[1:8] TXM[1:8] ISET LED[1:8][0] ...
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Group I/O Names Active Status LED[2][0] LED[3][3] LED[3][2] LED[3][0] LED[4][3] LED[4][2] LED[4][0] LED[5][3] LED[5][2] LED[5][0] LED[6][3] LED[6][2] LED[6][0] LED[7][3] LED[7][2] LED[7][0] LED[8][3] LED[8][2] LED[8][0] CTRL EN1P X1 X2 SCL SDA RST# TEST T[1], T[5] RLPBK February 2007 Description Reserved – ...
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Group I/O Names Active Status BIST PWR/GND VDD_RX GND_RX VDD_TX GND_TX VDD_RCV GND_RCV VDD_PLLTX GND_PLLTX GND-SIO VDD VDD-IO GND Note: 1. All unmanaged programming takes place at reset time only. For unmanaged programming Float Pull-down, U ...
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Pin Configuration February 2007 128-Pin PQFP (Q) 14 M9999-022807-1.1 ...
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Functional Overview: Physical Layer Transceiver 100BaseTX Transmit The 100BaseTX transmit function performs parallel-to-serial conversion, 4B/5B coding, scrambling, NRZ to NRZI conversion, MLT3 encoding and transmission. The circuit starts with a parallel to serial conversion, which converts the MII data from ...
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MDI/MDI-X Auto Crossover The KS8997 supports MDI/MDI-X auto crossover. This facilitates the use of either a straight connection CAT-5 cable or a crossover CAT-5 cable. The auto-sense function will detect remote transmit and receive pairs, and correctly assign the transmit ...
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Functional Overview: Switch Core Address Look-Up The internal look-up table stores MAC addresses and their associated information. It contains 1K full CAM with 48-bit address plus switching information. The KS8997 is guaranteed to learn 1K addresses and distinguishes itself from ...
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MAC (Media Access Controller) Operation The KS8995X strictly abides by IEEE 802.3 standards to maximize compatibility. Inter-Packet Gap (IPG frame is successfully transmitted, the 96 bit time IPG is measured between the two consecutive MTXEN. If the current ...
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Programmable Features Priority Schemes The KS8997 can determine priority through three different means at the ingress point. The first method is a simple per port method, the second is via the 802.1p frame tag and the third is by viewing ...
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The table below briefly summarizes priority features. For more detailed settings see “EEPROM Memory Map” section. Register(s) Bit(s) Global/Port 2 3 4-11 0 4-11 5 40-47 7-0 4- 7-0 4-11 3 VLAN Operation The VLAN’s are ...
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Station MAC Address (control frames only) The MAC source address can be programmed as used in flow control frames. The table below briefly summarizes this progammable feature. Register(s) Bit(s) Global/Port 48-53 7-0 Global EEPROM Operation The EEPROM interface utilizes 2 ...
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Address Name Description 0 = State “001” is low priority 1 = State “000” is high priority State “000” is low priority Port 1 Control Register 4 7-6 Reserved – set to zero TOS priority classification ...
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Address Name Description 0 = Low priority Insert VLAN tags for port 3 if non-existent Enable 0 = Disable Strip VLAN tags for port 3 if existent 1 = Enable Disable Enable ...
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Address Name Description TOS priority classification enable for port Enable 0 = Disable 802.1p priority classification enable for port Enable 0 = Disable Port based priority classification for port 6 ...
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Address Name Description Enable high and low output priority queues for port Enable 0 = Disable Reserved Register 12 7-0 Reserved Port 1 VLAN Mask Register 13 7 Reserved Port 8 inclusion 1 = Port ...
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Address Name Description Port 3 VLAN Mask Register 15 7 Reserved Port 8 inclusion Port 8 in the same VLAN as port Port 8 not in the same VLAN as port 3 Port ...
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Address Name Description Port 6 inclusion Port 6 in the same VLAN as port Port 6 not in the same VLAN as port 5 Port 5 inclusion Port 5 ...
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Address Name Description Port 3 inclusion Port 3 in the same VLAN as port Port 3 not in the same VLAN as port 7 Port 2 inclusion Port 2 ...
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Address Name Description Port 4 VLAN Tag Insertion Value Registers 28 7-5 User priority [2: CFI 28 3-0 VID [11:8] 29 7-0 VID [7:0] Port 5 VLAN Tag Insertion Value Registers 30 7-5 User priority [2: ...
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Address Name Description Station MAC Address Registers (all ports – MAC control frames only) 48 7-0 MAC address [47:40] 49 7-0 MAC address [39:32] 50 7-0 MAC address [31:24] 51 7-0 MAC address [23:16] 52 7-0 MAC address [15:8] 53 ...
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Absolute Maximum Ratings Supply Voltage (VDD_RX, VDD_TX, VDD_RCV, VDD, VDD_PLLTX).............................. –0.5V to +2.3V (VDDIO) ................................................. –0.5V to +3.8V Input Voltage ............................................. –0.5V to +4.0V Output Voltage .......................................... –0.5V to +4.0V Lead Temperature (soldering, 10 sec) .................... 270°C Storage Temperature (T ...
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Symbol Parameter Duty Cycle Distortion Overshoot V Reference Voltage of ISET SET Output Jitters 10BaseT Receive V Squelch Threshold SQ 10BaseT Transmit (measured differentially after 1:1 transformer Peak Differential Output Voltage P Jitters Added Rise/Fall Times Notes: 1. ...
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Timing Diagrams Symbol Parameter Clock Cycle t CYC Set-Up Time t S Hold Time t H Symbol Parameter Clock Cycle t CYC Set-Up Time t OV February 2007 Figure 2. EEPROM Input Timing Diagram Table 4. EEPROM Timing Parameters Figure ...
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Reference Circuit See “I/O Description” section for pull-up/pull-down and float information. February 2007 Figure 4. Unmanaged Programming Circuit 34 M9999-022807-1.1 ...
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Coding In 100BaseTX and 100BaseFX the data and frame control are encoded in the transmitter (and decoded in the receiver) using a 4B/5B code. The extra code space is required to encode extra control (frame delineation) points ...
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... Preamble and Start of Frame Delimiter 48-bit Destination MAC Address 48-bit Source MAC Address VLAN and priority tag (optional) Frame Length Higher Layer Protocol and Frame Data 32-bit Cyclical Redundancy Check End of Stream Delimiter Inter Frame Idles Table 7. MAC Frame for 802.3 36 KS8997/KSZ8997 M9999-022807-1.1 ...
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Selection of Isolation Transformer One simple 1:1 isolation transformer is needed at the line interface. An isolation transformer with integrated common- mode choke is recommended for exceeding FCC requirements. The following table gives recommended transformer characteristics. Characteristics Name Turns Ratio ...
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Package Information February 2007 128-Pin PQFP (Q) 38 M9999-022807-1.1 ...
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MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is ...