TDA5210T Infineon Technologies, TDA5210T Datasheet - Page 24
![IC ASK/FSK RECEIVER P-TSSOP-28](/photos/14/17/141745/448-28-tssop-1_sml.jpg)
TDA5210T
Manufacturer Part Number
TDA5210T
Description
IC ASK/FSK RECEIVER P-TSSOP-28
Manufacturer
Infineon Technologies
Datasheet
1.TDA5210.pdf
(53 pages)
Specifications of TDA5210T
Frequency
810MHz ~ 870MHz, 400MHz ~ 440MHz
Sensitivity
-107dBm
Modulation Or Protocol
ASK, FSK
Applications
Alarm Systems, Communication Systems
Current - Receiving
4.8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.6 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Package / Case
28-TSSOP
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000087156
Wireless Components
Figure 4-2
The switching point should be chosen according to the intended operating sce-
nario. The determination of the optimum point is described in the accompanying
Application Note, a threshold voltage level of 1.8V is apparently a viable choice.
It should be noted that the output of the 3VOUT pin is capable of driving up to
50µA, but that the THRES pin input current is only in the region of 40nA. As the
current drawn out of the 3VOUT pin is directly related to the receiver power con-
sumption, the power divider resistors should have high impedance values. The
sum of R1 and R2 has to be 600k
can thus be chosen as 240k , R2 as 360k
current of 5µA
Note: If the LNA gain shall be kept in either high or low gain mode this has to
be accomplished by tying the THRES pin to a fixed voltage. In order to achieve
high gain mode operation, a voltage higher than 2.8V shall be applied to the
THRES pin, such as a short to the 3VOLT pin. In order to achieve low gain
mode operation a voltage lower than 0.7V shall be applied to the THRES, such
as a short to ground.
As stated above the capacitor connected to the TAGC pin is generating the gain
control voltage of the LNA due to the charging and discharging currents of the
OTA and thus is also responsible for the AGC time constant. As the charging
and discharging currents are not equal two different time constants will result.
The time constant corresponding to the charging process of the capacitor shall
be chosen according to the data rate. According to measurements performed
at Infineon the capacitor value should be greater than 47nF.
2.5
1.5
0.5
1. note the 20k resistor in series with the 3.1V internal voltage source
3
2
1
0
-120
-110
RSSI Level and Permissive AGC Threshold Levels
1
and a threshold voltage of 1.8V
-100
RSSI Level
4 - 3
-90
Input Level at LNA Input [dBm]
-80
in order to yield 3V at the 3VOUT pin. R1
-70
to yield an overall 3VOUT output
-60
-50
Specification, May 2001
-40
Applications
TDA 5210
-30
RSSI-AGC.wmf