KAC-9618 Eastman Kodak Company, KAC-9618 Datasheet - Page 11
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KAC-9618
Manufacturer Part Number
KAC-9618
Description
IC SENSOR IMAGE VGA MONO 48-CLCC
Manufacturer
Eastman Kodak Company
Type
CMOS Imagingr
Datasheet
1.KAC-9618.pdf
(43 pages)
Specifications of KAC-9618
Pixel Size
7.5µm x 7.5µm
Active Pixel Array
648H x 488V
Frames Per Second
30
Voltage - Supply
3.3V
Package / Case
48-CLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM9618IEA
LM9618IEA
LM9618IEA
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KAC-9618
Manufacturer:
IXYS
Quantity:
2 100
IMAGE SENSOR SOLUTIONS
Functional Description
1.0
1.1
The KAC-9618 contains a CMOS active pixel array consisting of
488 rows by 648 columns. This active region is surrounded by 8
columns and 8 rows of optically shielded (black) pixels as shown
in Figure.
At the beginning of a given integration time the on-board timing
and control circuit will reset every pixel in the array one row at a
time as shown in Figure 7
Note that all pixels in the same row are simultaneously reset, but
not all pixels in the array
At the end of the integration time, the timing and control circuit
will address each row and simultaneously transfer the integrated
value of the pixel to a correlated double sampling circuit and
then to a shift register as shown in Figure 8.
Once the correlated double sampled data has been loaded into
the shift register, the timing and control circuit will shift them out
one pixel at a time starting with column “a”.
The pixel data is then fed into an analog video amplifier, where a
user programmed gain is applied .
After gain adjustment the analog value of each pixel is con-
verted to 12 bit digital data as shown in Figure 9.
www.kodak.com/go/imagers 585-722-4385
8 columns, 8 rows
mono-chrome active pixels
black pixels
640 columns, 480 rows
Light Capture and Conversion
OVERVIEW
Figure 7: CMOS APS region of the KAC-9618
Analog Data Out
Figure 8. Sensor Addressing Scheme
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
a b c d e f g h i
CDS/Shift Register
8 columns, 8 rows
black pixels
j
k l m n o p q r
11
The digital pixel data is further processed to:
• remove defects due to bad pixels,
• compensate black level, before being framed and presented
1.2
The programming, control and status monitoring of the KAC-
9618 is achieved through a two wire I
In addition, a slave address pin is provided (see Figure 11).
Additional control and status pins: snapshot and external event
synchronization are provided allowing the latency of the serial
control port to be bypassed during single frame capture. An
interrupt request pin is also available allowing complex snapshot
operations to be controlled via an external micro-processor (see
Figure 12).
Analog pixel values
on the digital output port. (see Figure 10).
Figure 12. Snapshot & External Event Trigger Signals
Register Bank
Video
AMP
Program and Control Interfaces
Figure 11. Control Interface to the KAC-9618.
Figure 9: Analog Signals In, Digital Data Out.
0-15dB
Figure 10. Digital Pixel Processing.
Generator
0-14dB
G
R
B
0-14dB
Timing
0-14dB
I
2
C Compatible
Serial I/F
MUX
Email:imagers@kodak.com
2
C compatible serial bus.
Digital pixel data
extsyn
snapshot
12 Bit A/D
sadr
sda
sclk
vsync
do[11:0]
pclk
hsync