N40P112 austriamicrosystems, N40P112 Datasheet
N40P112
Specifications of N40P112
Related parts for N40P112
N40P112 Summary of contents
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... High-speed I²C interface Configurable interrupt output for motion detection Push button feature 3 Applications The EasyPoint™ N40P112 is ideal for small form-factor manual input devices in battery operated equipment, such as Mobile phones, MP3 players, PDAs, GPS receivers, Gaming consoles and Analog joystick replacement. ...
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... Electrical Characteristics........................................................................................................................................................... 7.1 Operating Conditions............................................................................................................................................................................ 6 7.2 Digital IO Pads DC/AC Characteristics................................................................................................................................................. 6 7.3 Switch Characteristics .......................................................................................................................................................................... 7 7.4 Mechanical Specifications .................................................................................................................................................................... 8 7.5 Recommended Reflow Temperature Profile......................................................................................................................................... 8 8 Using the N40P112 Module ...................................................................................................................................................... 8.1 Powering up the Module....................................................................................................................................................................... 9 8.2 Registers Initialization........................................................................................................................................................................... 9 8.3 C Source Code Example .................................................................................................................................................................... 10 8.3.1 Initialization ................................................................................................................................................................................ 10 8.3.2 Offset Calibration ....................................................................................................................................................................... 10 8 ...
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... TM EasyPoint N40P112 Datasheet - 11.6 Yp Register (14h).............................................................................................................................................................................. 26 11.7 Yn Register (15h).............................................................................................................................................................................. 26 11.8 M_ctrl Register (2Bh)........................................................................................................................................................................ 26 11.9 J_ctrl Register (2Ch)......................................................................................................................................................................... 27 11.10 T_ctrl Register (2Dh) ...................................................................................................................................................................... 27 11.11 Control Register 2 (2Eh) ................................................................................................................................................................. 27 11.12 Registers Table ............................................................................................................................................................................... 28 12 Package Drawings and Markings ......................................................................................................................................... 13 Ordering Information............................................................................................................................................................. www.austriamicrosystems.com/N40P112 Revision 1 ...
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... TM EasyPoint N40P112 Datasheet - Pin Assignments Figure 3. N40P112-xxxxx-H Schematics U1 14 ModeOTP VDD 16 PDIO VDDp 15 PCLK VSS 5 tb0 6 tb1 RESET 7 tb2 8 tb3 SCL 9 Test_Coil SDA 17 EPAD ADDR GND S1 1 GND Dome_Switch 5.1 Pin Descriptions Table 1. Pin Descriptions Connector Pin # Pin Type 1 Power 2 Power ...
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... Peripheral supply voltage VDDp Input pin voltage Input current (latchup immunity) SCR Electrostatic discharge ESD T Storage temperature Strg Humidity non-condensing Degrees of protection www.austriamicrosystems.com/N40P112 Electrical Characteristics on page 6 is not implied. Exposure to absolute Min Max Units -0 -0.3 V SCL, SDA, RESETn, ADDR VDD + 0.3 -0.3 VDDp + 0 ...
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... Input leakage current LEAK Inputs: ADDR, RESETn (JEDEC76) V High level input voltage IH V Low level input voltage IL I Input leakage current LEAK Outputs: SDA V High level output voltage OH www.austriamicrosystems.com/N40P112 Min Typ Max Units 2.7 3.6 V 1.7 VDD V 3+3760/ts [ms] µA 10+3760/ts [ms] 3 µA ...
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... High level output voltage OH V Low level output voltage OL C Capacitive load L 7.3 Switch Characteristics Table 5. Switch Characteristics Parameter Contact resistance of dome switch Dielectric withstanding voltage Insulation resistance Bouncing (On/Off) www.austriamicrosystems.com/N40P112 Min Max Units VSS + 0.4 V VDDp * 0.2 V VSS + 0.4 V VDDp * 0.2 V 400 pF 400 ...
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... Single shaft LCP LCP & PA46 Stainless Steel or Copper alloy ±1.00mm (±10%) 0.22mm (±0.05mm) N40P112-000X1-H: 0.35N (±0.10N) N40P112-000X2-H: 0.55N (±0.15N) 1.80N (±15%) 10-500-10Hz 15 minutes, 12 cycles, 3 axes (total 36 cycles) Each direction > 1 million cycles > 1 million cycles > 5.0 kgf Dispensing Glue 40 drops (2X6 sides + 1X12 edges + 2X8 corners) @ 1.5m drop height to concrete surface, module is assembled to phone mechanics ...
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... Using the N40P112 Module 8.1 Powering up the Module The N40P112 module has a Power ON Reset (POR) cell to monitor the VDD voltage at startup and reset all the internal registers. After the internal reset is completed, the POR cell is disabled in order to save current during normal operation. ...
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... I2C_Read8(0x40, 0x10); // Read X position y_cal += (signed char) I2C_Read8(0x40, 0x11); // Read Y position } // offset_X and offset_Y are global variables, used for each coordinate readout in the interrupt routine offset_X = -(x_cal>>4); // Average X: divide by 16 offset_Y = -(y_cal>>4); // Average Y: divide Enable the MCU interrupts } www.austriamicrosystems.com/N40P112 Revision 1 ...
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... Y_temp = y_reg + offset_Y; /* OPTIONAL: If X_temp and Y_temp are near the center since a few interrupts, meaning the knob has been released, the module can be put back in a slow power mode (e.g. Wakeup mode INT_function=1 with 320ms rate Enable the MCU interrupts } www.austriamicrosystems.com/N40P112 Revision 1 ...
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... X = 0.5mm → X register = - 1.0mm → X register = -128 → Y register = 0mm → Y register = 0mm X_Reg < Xn → Int = 0 (active) X_Reg < Xn → Int = 0 (active) (see I²C Registers on page 23) 8.2 and 8.3 or refer to the austriamicrosystems N40P112 encoder application notes: Revision 1 have been set by the user ...
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... Those values are in an ideal condition, where the knob takes place over the center position of the N40P112 sensor once released. The zero position may vary between two N40 modules, and an offset must be applied to X and Y in order to compensate the X,Y coordinates to 0,0 once the knob is released. More information can be found in chapters Figure 7. X Register / X Displacement (Y=0µ ...
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... START-UP. After power up and after applying a soft reset (Reg 0Fh [1]) or hardware reset (RESETn input, LOW pulse >100ns), N40P112 enters the START- UP state. During this state the internal registers are loaded with their reset values. Then the N40P112 will perform one measurement and switches automatically into the WAIT state ...
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... The N40P112 supports the 2-wire high-speed I²C protocol in device mode, according to the NXP specification UM10204. The host MCU (master) has to initiate the data transfers. The 7-bit device address of the N40P112 depends on the state at the pin ADDR. ADDR = 0 → Slave address =‘1000 000’ (40h) ADDR = 1 → ...
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... I/O Capacitance (SDA, SCL) I/O 1. Maximum V = VDDpmax +0.5V or 5.5V, which ever is lower For capacitive bus loads between 100pF and 400pF, the timing parameters must be linearly interpolated. www.austriamicrosystems.com/N40P112 Condition VDDp < 2V VDDp < 2V SCLH output levels between 0.3VDDp and 0.7VDDp Input Voltage between ...
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... I²C Modes The N40P112 supports the I²C bus protocol. A device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. The device that controls the message is called a master. The devices that are controlled by the master are referred to as slaves. A master device that generates the serial clock (SCL), controls the bus access, and generates the START and STOP conditions must control the bus. The N40P112 operates as a slave on the I² ...
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... Writing A write to a wrong address is not acknowledged by the N40P112 slave, although the address pointer is increased. When the address pointer points to a valid address again, a successful write accessed is acknowledged. Page write over the whole address range is possible including address overflow ...
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... SDA. After the N40P112 acknowledges the slave address + write bit, the master transmits a register address to the N40P112. This sets the address pointer on the N40P112. If the address is a valid readable address the N40P112 answers by sending an acknowledge. If the address-pointer points to an invalid position a “not acknowledge” is sent. The master may then transmit zero or more bytes of data ...
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... Slave Transmitter Mode (Read Mode): The first byte is received and handled as in the slave receiver mode. However, in this mode, the direction bit indicates that the transfer direction is reversed. Serial data is transmitted on SDA by the N40P112 while the serial clock is input on SCL. START and STOP conditions are recognized as the beginning and end of a serial transfer. The slave address byte is the first byte received after the master generates a START condition ...
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... Datasheet - I ² 10.4.5 High Speed Mode The N40P112 is capable to work in HS-mode. For switching to HS-mode the Master has to send the sequence: START, MASTER CODE, NACK. This sequence is sent in FS-mode device is allowed to acknowledge the master code, the master code is followed by a not-acknowledge. After a device receives the master code it has to switch from FS-settings to HS-settings within t receive a STOP command ...
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... Sequential read over the whole address range is possible including address overflow. Writing: A write to a wrong address is not acknowledged by the N40P112 slave, although the address pointer is increased. When the address pointer points to a valid address again, a successful write accessed is acknowledged. Page write over the whole address range is possible including address overflow ...
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... Soft_rst bit goes back to 0 once the internal reset sequence is finished Conversion of new coordinates ongoing, no valid coordinate is present in the X and Y_res_int registers. Reading those registers at that moment can give wrong values New coordinate values are ready in X and Y_res_int registers. www.austriamicrosystems.com/N40P112 Bit 4 Bit 3 Bit 2 INT_disable ...
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... Note: The values in Control Register 1, X_register and Y_res_int register are frozen when the I²C address pointer is set to 0Fh, 10h or 11h. This ensures that the Data_valid bit, X and Y values are taken at the same time. In order to get updated values from those registers, set the address pointer to any other address. www.austriamicrosystems.com/N40P112 ∆t timebase ...
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... R/W R/W R/W Reset value: 1111 1011 (-5d) Bit Xn range value, Two’s complement (signed: -128 ~ +127). 7:0 Determines the RIGHT threshold for the activation of INTn output (if output enabled), when bit INT_function = 1 Control Register 1 (0Fh) on page www.austriamicrosystems.com/N40P112 Bit 4 Bit 3 X[4] X[ Bit Description ...
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... M_ctrl[7] M_ctrl[6] M_ctrl[5] R/W R/W R/W Reset value: 0000 0000 (00h) Bit Middle hall element control register. 7:0 The M_ctrl register must be set to 00h (default value) after power up for N40P112 module. www.austriamicrosystems.com/N40P112 Bit 4 Bit 3 Yp[4] Yp[3] R/W R/W Bit Description 23). ...
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... J_ctrl[5] R/W R/W R/W Reset value: 0000 0110 (06h) Bit Sector dependent attenuation of the outer Hall elements. 7:0 The J_ctrl register must be set to 06h (default value) after power up for N40P112 module. 11.10 T_ctrl Register (2Dh) Bit 7 Bit 6 Bit 5 T_ctrl[7] T_ctrl[6] T_ctrl[5] ...
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... R/W c4_neg <11:8> c4_neg <7:0> c4_pos <11:8> c4_pos <7:0> www.austriamicrosystems.com/N40P112 Reset Format Bit Value IC Identification 8 bit Manufacture ID Code 0C 0Ch <7:0> 8 bit Component ID Version 0D 0Dh <7:4> 8 bit Silicon Revision 0E 00h <7:0> Control_register_1 1 : Idle mode 0Fh 1b <7> Low Power mode Low Power readout time base register ...
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... Control Register for the Algorithm Middle Hall element control 2Bh 00h <7:0> For N40P112, configure to 00h (default) Attenuation of the outer Hall elements 2Ch 06h <7:0> For N40P112, configure to 06h (default) Scaling factor of XY coordinates 2Dh 09h <7:0> For N40P112, configure to 0Dh Control_register_2 2Eh 1b <7> ...
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... TM EasyPoint N40P112 Datasheet - Package Drawings and Markings Figure 18. N40P112 Dimensions (mm ±0.15) Figure 19. Recommended PCB Layout (mm ±0.05) www.austriamicrosystems.com/N40P112 Revision 1 ...
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... TM EasyPoint N40P112 Datasheet - Figure 20. Recommended on Casing Design & Mounting Note www.austriamicrosystems.com/N40P112 Revision 1 ...
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... Revision Date 0.8 16 Jul, 2010 1.0 01 Dec, 2010 1.1 16 Feb, 2011 Note: Typos may not be explicitly mentioned under revision history. www.austriamicrosystems.com/N40P112 Owner jlu Updated Applications on page 1 Updated sections 8.3.1, 10, 10.2, 10.3, 11.1, 11.3, 11.10, 11.11, Revision 1.1 Description Initial release and url in the footer 11 ...
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... The devices are available as the standard products shown in Table 9. Ordering Information Ordering Code N40P112-00001-H N40P112-00011-H N40P112-00002-H N40P112-00012-H Note: All products are RoHS compliant. Buy our products or get free samples online at ICdirect: Technical Support is available at http://www.austriamicrosystems.com/Technical-Support For further information and requests, please contact us or find your local distributor at http://www ...
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... No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG Tobelbaderstrasse 30 A-8141 Unterpremstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact www.austriamicrosystems.com/N40P112 Revision 1 ...