FDS9926A Fairchild Semiconductor, FDS9926A Datasheet - Page 2

MOSFET N-CH DUAL 20V 6.5A 8SOIC

FDS9926A

Manufacturer Part Number
FDS9926A
Description
MOSFET N-CH DUAL 20V 6.5A 8SOIC
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet

Specifications of FDS9926A

Fet Type
2 N-Channel (Dual)
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
30 mOhm @ 6.5A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
6.5A
Vgs(th) (max) @ Id
1.5V @ 250µA
Gate Charge (qg) @ Vgs
9nC @ 4.5V
Input Capacitance (ciss) @ Vds
650pF @ 10V
Power - Max
900mW
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Configuration
Dual Dual Drain
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.03 Ohm @ 4.5 V
Forward Transconductance Gfs (max / Min)
22 S
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
+/- 10 V
Continuous Drain Current
6.5 A
Power Dissipation
2000 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDS9926ATR

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Notes:
1. R
2. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%
Electrical Characteristics
Symbol
Off Characteristics
BV
I
I
On Characteristics
V
R
g
Dynamic Characteristics
C
C
C
R
Switching Characteristics
t
t
t
t
Q
Q
Q
Drain–Source Diode Characteristics and Maximum Ratings
V
t
Q
I
DSS
GSS
d(on)
r
d(off)
f
rr
D(on)
the drain pins. R
FS
BV
V
GS(th)
DS(on)
iss
oss
rss
G
SD
g
gs
gd
rr
GS(th)
JA
DSS
T
T
DSS
J
J
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Drain–Source Diode Forward Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
JC
is guaranteed by design while R
a) 78°/W when
mounted on a 0.5in
pad of 2 oz copper
Parameter
(Note 2)
(Note 2)
2
CA
is determined by the user's board design.
T
A
= 25°C unless otherwise noted
b) 125°/W when
V
I
V
V
V
I
V
V
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
V
I
D
D
F
GS
DS
GS
DS
GS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
GS
= 6.5 A,
= 250 A, Referenced to 25 C
= 250 A, Referenced to 25 C
mounted on a 0.02
in
copper
2
= 4.5 V, I
= 0 V,
= 16 V,
= 8 V,
= V
= 4.5 V, I
= 2.5 V, I
= 4.5 V,
= 5 V,
= 10 V, V
= 10 V,
= 4.5 V, R
= 10 V,
= 4.5 V
= 0 V,
= 15 mV, f = 1.0 MHz
pad of 2 oz
Test Conditions
GS
,
D
I
d
S
I
V
V
I
I
iF
=6.5A, T
D
D
D
D
I
I
D
V
= 1.3 A
/d
D
D
GS
DS
GS
= 250 A
= 250 A
= 6.5 A
= 5.4 A
GEN
= 3 A,
DS
= 6.5 A
= 1 A,
t
= 0 V
= 100 A/µs
= 0 V
= 0 V,
= 5 V
= 6
J
=125 C
(Note 2)
Min
0.6
20
15
c) 135°/W when mounted on a
Scale 1 : 1 on letter size paper
minimum pad.
Typ Max Units
0.73
650
150
1.4
6.2
1.2
1.7
14
–3
25
35
35
22
85
15
15
1
8
9
4
5
1.5
1.3
100
30
43
50
16
17
26
FDS9926A Rev E (W)
1
9
9
mV/ C
mV/ C
m
nA
nC
nC
nC
nS
nC
pF
pF
pF
ns
ns
ns
ns
A
V
V
S
V
A

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