SI5517DU-T1-E3 Vishay, SI5517DU-T1-E3 Datasheet - Page 14

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SI5517DU-T1-E3

Manufacturer Part Number
SI5517DU-T1-E3
Description
MOSFET N/P-CH 20V CHIPFET PPAK
Manufacturer
Vishay
Series
TrenchFET®r
Datasheet

Specifications of SI5517DU-T1-E3

Fet Type
N and P-Channel
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
39 mOhm @ 4.4A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
7.2A, 4.6A
Vgs(th) (max) @ Id
1V @ 250µA
Gate Charge (qg) @ Vgs
16nC @ 8V
Input Capacitance (ciss) @ Vds
520pF @ 10V
Power - Max
2.3W
Mounting Type
Surface Mount
Package / Case
PowerPAK® ChipFet Dual
Configuration
Dual Dual Drain
Transistor Polarity
N and P-Channel
Resistance Drain-source Rds (on)
0.039 Ohms
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
+/- 8 V
Continuous Drain Current
7.2 A, - 4.6 A
Power Dissipation
2.3 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Fall Time
10 ns, 55 ns
Minimum Operating Temperature
- 55 C
Rise Time
65 ns, 35 ns
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SI5517DU-T1-E3TR
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR PowerPAK
www.vishay.com
10
Return to Index
(0.009)
(0.014)
0.225
0.350
(0.046)
1.175
Note: This is Flipped Mirror Image
Pin #1 Location is Top Left Corner
Recommended Minimum Pads
Dimensions in mm/(Inches)
(0.012)
(0.012)
0.300
0.300
®
ChipFET
(0.106)
2.700
(0.026)
(0.026)
0.650
0.650
®
(0.014)
0.350
Dual
(0.060)
1.525
Document Number: 69949
(0.012)
0.300
(0.008)
0.200
Revision: 21-Jan-08

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