WM8903LGEFK/V Wolfson Microelectronics, WM8903LGEFK/V Datasheet - Page 111

• Manufacturer Part Number: WM8903LGEFK/V
• Description: Audio CODECs ULTRA LOW PWR HI FI CODEC
• Manufacturer: Wolfson Microelectronics

Specifications of WM8903LGEFK/V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pre-Production
QUICK START-UP AND SHUTDOWN
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The WM8903 has the capability to perform a quick start-up and shut-down with a minimum number
of register operations. The Control Write Sequencer is configured with default start-up settings that
configure the device for DAC playback via Headphone and Line Output. Assuming a 12.288MHz
external clock, the start-up sequence configures the device for 48kHz playback mode.
The start-up sequence requires three register write operations. The shut-down sequence requires
just a single register write. The minimum procedure for executing the quick start-up and shut-down
sequences is described below. See “Control Write Sequencer” for more details.
START-UP
An external clock must be applied to MCLK. The default start-up sequence assumes this is 12MHz.
The following register operations will initiate the default start-up sequence.
Table 74 Quick Start Enable
Assuming 12MHz input clock, the start-up sequence will take approximately 425ms to complete.
The WSEQ_BUSY bit (in Register R112, see Table 69) will be set to 1 while the sequence runs.
When this bit returns to 0, the device has been set up and is ready for DAC playback operation.
SHUTDOWN
The default shut-down sequences assumes the initial device conditions are as configured by the
default start-up sequence.
The following register operation will initiate the default shut-down sequence.
Table 75 Quick Shut-Down Enable
Assuming 12.288MHz input clock, the shut-down sequence will take approximately 325ms to
complete.
The WSEQ_BUSY bit (in Register R112, see Table 69) will be set to 1 while the sequence runs.
When this bit returns to 0, the system clock can be disabled (CLK_SYS_ENA=0) and MCLK can be
stopped.
R108 (6Ch)
R22 (16h)
R111 (6Fh)
R111 (6Fh)
REGISTER
REGISTER
ADDRESS
ADDRESS
VALUE
VALUE
0100h
0004h
0100h
0120h
WSMD_CLK_ENA = 1
This enables the Write Sequencer Clock
CLK_SYS_ENA = 1
This enables the System Clock
WSEQ_START_INDEX = 00
WSEQ_START = 1
WSEQ_ABORT = 0
This starts the Write Sequencer at Index address 0 (00h)
WSEQ_START_INDEX = 20h
WSEQ_START = 1
WSEQ_ABORT = 0
This starts the Write Sequencer at Index address 32 (20h)
DESCRIPTION
DESCRIPTION
PP, Rev 3.1, August 2009
WM8903
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