WM8903LGEFK/V Wolfson Microelectronics, WM8903LGEFK/V Datasheet - Page 96

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WM8903LGEFK/V

Manufacturer Part Number
WM8903LGEFK/V
Description
Audio CODECs ULTRA LOW PWR HI FI CODEC
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8903LGEFK/V

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WM8903
INTERRUPTS
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The Interrupt Controller has multiple inputs. These include the GPIO input pins and the MICBIAS
current detection circuits. Any combination of these inputs can be used to trigger an Interrupt (IRQ)
event.
There is an Interrupt Status field associated with each of the IRQ inputs. These are listed within the
Interrupt Status Register (R121), as described in Table 66. The status of the IRW inputs can be read
at any time from this register or else in response to the Interrupt Output being signalled via a GPIO
pin.
The Interrupt Output represents the logical ‘OR’ of all the unmasked IRQ inputs. The bits within the
Interrupt Status register (R121) are latching fields and, once they are set, they are not reset until the
Status Register is read. Accordingly, the Interrupt Output is not reset until each of the unmasked IRQ
inputs has been read. Note that, if the condition that caused the IRQ input to be asserted is still valid,
then the Interrupt Output will remain set even after the Status register has been read.
When GPIO input is used as Interrupt event, polarity can be set using GP_IP_CFG as described in
Table 65. The polarity of the MICBIAS detection functions can be set using MICDET_INV and
MICSHRT_INV as described in Table 66. This allows the IRQ event to be used to indicate the
removal of a microphone accessory in addition to insertion detection.
By default, the Interrupt Output is Active High. The polarity can be inverted using IRQ_POL.
The Interrupt Output may be configured on the INTERRUPT/GPIO4 pin or on the GPIO1/DMIC_LR,
GPIO2/DMIC_DAT, GPIO3/ADDR or BCLK/GPIO5 pins. Interrupt Output is the default function on
the INTERRUPT pin (GP4_FN = 2h), but the INTERRUPT pin can also be used to support other
functions. See “General Purpose Input/Output (GPIO)” for details of how to configure GPIO pins for
Interrupt (IRQ) output.
The WM8903 Interrupt Controller circuit is illustrated in Figure 54. The associated control fields are
described in Table 66.
Figure 55 Interrupt Controller
MIC_DETECT
WSEQ_BUSY
MIC_SHORT
GPIO_IRQ[1]
GPIO_IRQ[2]
GPIO_IRQ[3]
GPIO_IRQ[4]
GPIO_IRQ[5]
MICSHRT_INV
MICDET_INV
status register
Latches
Reset on
read
IM_MICSHRT_EINT
IM_GP1_EINT
Read-only; cleared on read
Status Registers
IRQ_POL
PP, Rev 3.1, August 2009
Pre-Production
INTERRUPT
96

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