CS5360-BSR Cirrus Logic Inc, CS5360-BSR Datasheet - Page 16

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CS5360-BSR

Manufacturer Part Number
CS5360-BSR
Description
Audio D/A Converter ICs IC 24-Bit Stereo ADC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5360-BSR

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5. PIN DESCRIPTIONS
High Pass Filter Defeat - HP DEFEAT
Overflow - OVFL
Positive Analog Power - VA+
Analog Ground - AGND
DGND - Digital Ground
16
High Pass Filter Defeat
Pin 3, Input
Function:
Pin 4, Input
Function:
Pin 5, Input
Function:
Pin 1, Input
Function
Pin 2, Input
Function
Serial Data Output
A high logic level on this pin disables the digital high pass filter. A low logic level on this pin enables the
high pass filter.
Overflow indicates analog input overrange, for both the Left and Right channels, since the last update
request on the PEAK UPDATE (PU) pin. A value of 1 in the register indicates an overrange condition.
The left channel information is output on OVFL during the left channel portion of LRCK. The right
channel information is available on OVFL during the right channel portion of LRCK. The registers are
updated with a high to low transition on the PEAK UPDATE pin. A 47 k
will set the CS5360 in Master Mode.
Positive analog supply. Nominally +5 volts.
Analog ground reference.
Digital ground reference.
Serial Data Clock
Analog Ground
Digital Ground
Analog Power
Frame Signal
Digital Power
Master Clock
Overflow
HPDEFEAT
FRAME
SDATA
AGND
DGND
MCLK
SCLK
OVFL
VA+
VD+
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIF0
DIF1
RST
AINL+
AINL-
CMOUT
AINR-
AINR+
LRCK
PU
Digital Interface Format 0
Digital Interface Format 1
Reset
Non-Inverting Left Channel Input
Inverting Left Channel Input
Common Mode Output
Inverting Right Channel Input
Non-Inverting Right Channel Input
Left / Right Clock
Peak Update
pull-down resistor on this pin
CS5360
DS280PP2

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