CS5360-BSR Cirrus Logic Inc, CS5360-BSR Datasheet - Page 6

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CS5360-BSR

Manufacturer Part Number
CS5360-BSR
Description
Audio D/A Converter ICs IC 24-Bit Stereo ADC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5360-BSR

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SWITCHING CHARACTERISTICS
Logic 1 = VA+ = VD+; C
Notes: 7. SCLK Rising for Mode 1
6
Output Sample Rate
MCLK Period
MCLK Low
MCLK High
Peak Update Pulse Width
Master Mode
SCLK Falling to LRCK
SCLK Falling to SDATA Valid
SCLK Duty Cycle
SCLK Falling to Frame Valid
LRCK Edge to OVFL Valid
LRCK Edge to OVFL Edge Delay
Slave Mode
LRCK Duty Cycle
SCLK Period
SCLK Pulse Width Low
SCLK Pulse Width High
SCLK Falling to SDATA Valid
LRCK Edge to MSB Valid
SCLK Rising to LRCK Edge Delay
LRCK Edge to Rising SCLK Setup Time
SCLK Falling to Frame Delay
10. Pulse Width High for Mode 1
11. Pulse Width Low for Mode 1
12.
13.
14. SCLK Falling for Mode 1
15.
8.
9.
------------------------------ -
----------------------- -
--------------------------- -
--------------------------- -
--------------------------- -
1024 F S
96 F
512 F
512 F
384 F S
1
1
1
1
1
S
S
S
+
+
+
+
20 ns
50 ns
35 ns
30 ns
L
Parameter
= 20 pF)
MCLK / LRCK = 256
MCLK / LRCK = 384
MCLK / LRCK = 512
MCLK / LRCK = 256
MCLK / LRCK = 384
MCLK / LRCK = 512
MCLK / LRCK = 256
MCLK / LRCK = 384
MCLK / LRCK = 512
(T
(Note 10)
(Note 14)
(Note 14)
A
(Note 11)
(Note 7)
(Note 7)
(Note 7)
(Note 7)
= 25 °C; VA+ = 5 V ±5%; Inputs: Logic 0 = 0 V,
Symbol
pu
t
t
t
t
t
t
t
sclkw
t
sclkh
t
t
t
t
t
t
t
lrdss
t
clkw
mslr
sclkl
F
clkh
sdo
ovfl
ovfl
dss
slr1
slr2
clkl
pulse
sfo
sfo
S
Note 13
Note 13
Note 9
Min
8.0
-10
-10
-10
-10
-10
78
52
39
31
20
15
31
20
15
20
25
50
50
-
-
-
-
Typ
50
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Note 12
Note 13
Note 13
Note 15
Note 8
1953
1302
Max
976
50
10
35
30
75
-
-
-
-
-
-
-
-
-
-
-
-
-
CS5360
DS280PP2
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%

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