SL28748ELC Silicon Laboratories Inc, SL28748ELC Datasheet - Page 19

• Manufacturer Part Number: SL28748ELC
• Description: Clock Generators & Support Products Calpella IronLake Jasper Forest IbexPk
• Manufacturer: Silicon Laboratories Inc

Specifications of SL28748ELC

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DOC#: SP-AP-0017 (Rev. AA)
Document History Page
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon
Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of
information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or param-
eters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental
damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or
for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur.
Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold
Silicon Laboratories harmless against all claims and damages.
Document Title: SL28748 PC EProClock
DOC#: SP-AP-0017 (Rev. AA)
REV.
1.0
1.1
1.2
1.3
1.4
1.5
1.6
AA
ECR#
1456
10/09/08
10/23/08
10/16/09
05/18/10
1/27/09
3/16/09
3/25/09
6/03/09
Issue
Date
Change
Orig. of
JMA
JMA
JMA
JMA
JMA
JMA
JMA
JMA
Initial Release
1. Changed operating temperature to 0-85C
2. Re-aligned ordering part number description
1. Updated Rev. ID
2. Updated definition of Byte 6 bit 5 and 3
3. Updated Byte 13 and single-ended slew rate table
4. Updated Byte 14
5. Updated Feature description
6. Added less than symbol in power consumption value
7. Updated ordering part number
8. Changed package information
9. Changed Wireless Friendly Mode to 111
1. Added PC EProClock
2. Updated Block Diagram
3. Updated 27MHz slew rate measurement window
4. Updated power consumption
1. Updated Package information removed punch version with saw version
2. Updated Period at 100MHz for CPU clocks
3. Updated Revision ID
4. Added Power down Spec
5. Added PC EProClock
6. Added CPU Skew
1. Updated Revision ID
2. Removed 3-bit differential slew rate
3. Removed 0.1s from CPU duty cycle spec
4. Changed SATA PLL2 to PLL4
5. Updated IDD measurement condition
1. Removed the word “Preliminary”
2. Added Note in package diagram
3. Updated text content
4. Added information on trace length in Figure 8
5. Removed CPU Driven Figures
6. Edited CK_PWRGD to CKPWRGD
1. Updated MIL-STD to Jedec Standard
2. Updated VDD_IO spec to 4.6V maximum value
3. Combined Commercial and Industrial
4. Changed Revision to be ISO compliant
5. Removed refernce to Application Note#25.
6. Added feature for clock input
7. Removed skew data on REF clock
®
Generator for Intel Calpella Chipset
®
®
Programmed Technology in Feature section
Technology description
Description of Change
SL28748
Page 19 of 19