SL28506BZI-2T Silicon Laboratories Inc, SL28506BZI-2T Datasheet - Page 7

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SL28506BZI-2T

Manufacturer Part Number
SL28506BZI-2T
Description
Clock Generators & Support Products CK505 v1.1 PCIe Gen2
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SL28506BZI-2T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Rev 1.3 June 18, 2008
Byte 2: Control Register 2 (continued)
Byte 3: Control Register 3
Byte 4: Control Register 4
Byte 5: Control Register 5
Bit
Bit
Bit
Bit
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
@Pup
@Pup
@Pup
@Pup
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
SRC0/DOT96_OE
OE#_0/2_SEL_A
OE#_1/4_SEL_A
OE#_0/2_SEL_B
SRC2/SATA_OE
OE#_0/2_EN_A
OE#_1/4_EN_A
OE#_0/2_EN_B
OE#_1/4_EN_B
SRC8/ITP_OE
PLL1_SS_EN
PLL3_SS_EN
SRC10_OE
SRC11_OE
SRC9_OE
SRC7_OE
SRC6_OE
SRC5_OE
SRC4_OE
SRC3_OE
SRC1_OE
CPU1_OE
CPU0_OE
PCI3_OE
PCI2_OE
PCI1_OE
PCI0_OE
Name
Name
Name
Name
Output enable for PCI3, 0 = Output Disabled, 1 = Output Enabled
Output enable for PCI2, 0 = Output Disabled, 1 = Output Enabled
Output enable for PCI1, 0 = Output Disabled, 1 = Output Enabled
Output enable for PCI0, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC11, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC10, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC9, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC8 or ITP, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC7, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC6, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC5, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC4, 0 = Output Disabled, 1 = Output Enabled
Enable OE#_0/2 (clk req)
0 = Disabled OE#_0/2, 1 = Enabled OE#_0/2,
Set OE#_0/2 → SRC0 or SRC2
0 = OE#_0/2→SRC0, 1 = OE#_0/2→SRC2
Enable OE#_1/4 (clk req)
0 = Disabled OE#_1/4, 1 = Enabled OE#_1/4,
Set OE#_1/4 → SRC1 or SRC4
0 = OE#_1/4→SRC1, 1 = OE#_1/4→SRC4
Enable OE#_0/2 (clk req)
0 = Disabled OE#_0/2 1 = Enabled OE#_0/2
Set OE#_0/2 → SRC0 or SRC2
0 = OE#_0/2→SRC0, 1 = OE#_0/2→SRC2
Enable OE#_1/4 (clk req)
0 = Disabled OE#_1/4, 1 = Enabled OE#_1/4,
Output enable for SRC3, 0 = Output Disabled, 1 = Output Enabled
Output enable for SATA/SRC2, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC, 0 = Output Disabled, 1 = Output Enabled
Output enable for SRC0/DOT96
0 = Output Disabled, 1 = Output Enabled
Output enable for CPU1, 0 = Output Disabled, 1 = Output Enabled
Output enable for CPU0, 0 = Output Disabled, 1 = Output Enabled
Enable PLL1’s spread modulation,
0 = Spread Disabled 1 = Spread Enabled
Enable PLL3’s spread modulation
0 = Spread Disabled, 1 = Spread Enabled
Description
Description
Description
Description
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SL28506-2

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