ISPGDX240VA-7BN388 Lattice, ISPGDX240VA-7BN388 Datasheet - Page 12

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ISPGDX240VA-7BN388

Manufacturer Part Number
ISPGDX240VA-7BN388
Description
Analog & Digital Crosspoint ICs PROGRAMMABLE GEN DIG CROSSPOINT
Manufacturer
Lattice
Datasheet

Specifications of ISPGDX240VA-7BN388

Mounting Style
SMD/SMT
Number Of Arrays
1
Operating Supply Voltage
3.3 V
Supply Type
Single
Configuration
240 x 240
Package / Case
PLCC-28
Input Level
TTL
Output Level
TTL
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Product
Digital Crosspoint
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPGDX240VA-7BN388
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
ISPGDX240VA-7BN388I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
ispGDX240VA timings are specified with a GRP load
(fanout) of four I/O cells. The figure below shows the ∆
GRP Delay with increased GRP loads. These deltas
External Timing Parameters (Continued)
ispGDX240VA Maximum
10
8
6
4
2
0
4
10
20
I/O Cell Fanout
GRP Delay vs. I/O Cell Fanout
12
30
apply to any signal path traversing the GRP (MUXA-D,
OE, CLK/CLKEN, MUXsel0-1). Global Clock signals
which do not use the GRP have no fanout delay adder.
Specifications ispGDX240VA
40
50
60
70

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