LAN9500A-ABZJ SMSC, LAN9500A-ABZJ Datasheet - Page 29

• Manufacturer Part Number: LAN9500A-ABZJ
• Description: Ethernet ICs Hi-Speed USB 2.0 10/100 Ethernet CTRL
• Manufacturer: SMSC

Specifications of LAN9500A-ABZJ

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

USB 2.0 to 10/100 Ethernet Controller
Datasheet
SMSC LAN950x Family
5.2
BITS
1
0
GPIO10 Detection Select
This bit selects the detection mode for GPIO10 when operating in PME mode. In PME mode, GPIO10
is usable in both Internal and External PHY mode as a wakeup pin. This parameter defines whether
the wakeup should occur on an active high or active low signal.
0 = Active-low detection for GPIO10.
1 = Active-high detection for GPIO10.
Note:
RESERVED
EEPROM Defaults
The signature value of 0xA5 is stored at address 0. A different signature value indicates to the
EEPROM controller that no EEPROM or an un-programmed EEPROM is attached to the device. In
this case, the hardware default values are used, as shown in
Note: The Configuration Flags are affected by the PWR_SEL and RMT_WKP straps.
MAC Address
Full-Speed Polling Interval (mS)
Hi-Speed Polling Interval (mS)
Configuration Flags
Maximum Power (mA)
Vendor ID
Product ID
If
GPIO PME Enable
FIELD
Table 5.3 GPIO PME Flags (continued)
is 0, this bit is ignored.
Table 5.4 EEPROM Defaults
DATASHEET
LAN9500/LAN9500i
LAN9500A/LAN9500Ai
DESCRIPTION
29
DEVICE
DEFAULT VALUE
FFFFFFFFFFFFh
0424h
01h
04h
04h
FAh
Table
9500h
9E00h
5.4.
PRODUCT ID
Revision 1.0 (05-17-10)