LAN9500-ABZJ-TR SMSC, LAN9500-ABZJ-TR Datasheet - Page 42

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LAN9500-ABZJ-TR

Manufacturer Part Number
LAN9500-ABZJ-TR
Description
Ethernet ICs USB 2.0 to 10/100 Ethernet CTRL TR
Manufacturer
SMSC
Datasheet

Specifications of LAN9500-ABZJ-TR

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Revision 1.0 (05-17-10)
Figure 6.2
EEPROM Configuration:
PME signaling configuration (as determined by PHY Mode)
Note: A POR occurring when PME_MODE_SEL = 1 and an EEPROM present with the GPIO PME
GPIO PME Enable
GPIO PME Configuration
GPIO PME Length
GPIO PME Polarity
GPIO PME Buffer Type
GPIO PME WOL Select
GPIO10 Detection Select
Power Method
MAC address for Magic Packet
GPIO0 signals PME
GPIO1 is PME_MODE_SEL
Enable set results in the device entering PME Mode.
flowcharts PME operation while in Internal PHY mode. The following conditions hold:
= 1 (self powered)
= 0 (NA)
= 1 (enabled)
= 1 (high level signals event)
= 1 (Push-Pull)
= 0 (Magic Packet wakeup)
= 0 (PME signaled via level on GPIO pin)
= 0 (Active-low detection)
DATASHEET
42
USB 2.0 to 10/100 Ethernet Controller
SMSC LAN950x Family
Datasheet

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