DS26528 Maxim Integrated Products, DS26528 Datasheet - Page 20
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DS26528
Manufacturer Part Number
DS26528
Description
Network Controller & Processor ICs Octal E1-T1-J1 Singl e-Chip Transceiver (
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26528G.pdf
(276 pages)
Specifications of DS26528
Product
Framer
Number Of Transceivers
8
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
875 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
TE-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DS26528GA2
Manufacturer:
AFATECH
Quantity:
3 623
Part Number:
DS26528GA2
Manufacturer:
MAXIM/美信
Quantity:
20 000
TSSYNCIO
TSYSCLK
TSYNC1
TSYNC2
TSYNC3
TSYNC4
TSYNC5
TSYNC6
TSYNC7
TSYNC8
TSER1
TSER2
TSER3
TSER4
TSER5
TSER6
TSER7
TSER8
TCLK1
TCLK2
TCLK3
TCLK4
TCLK5
TCLK6
TCLK7
TCLK8
NAME
TSIG1
TSIG2
TSIG3
TSIG4
TSIG5
TSIG6
TSIG7
TSIG8
M10
D12
N11
E10
B13
P13
N10
T12
B11
A13
N13
T10
R12
A11
C13
PIN
L11
F10
L10
M6
M7
E7
R4
N7
C5
D7
P5
B4
D5
A6
R6
F6
L8
F7
T4
TYPE
I/O
I/O
I
I
I
I
Transmit NRZ Serial Data. These pins are sampled on the falling edge of TCLK
when the transmit-side elastic store is disabled. These pins are sampled on the
falling edge of TSYSCLK when the transmit-side elastic store is enabled.
In IBO mode, data for multiple framers can be used in high-speed multiplexed
scheme. This is described in Section 8.8.2. The table there presents the
combination of framer data for each of the streams.
TSYSCLK is used as a reference when IBO is invoked.
Transmit Clock. A 1.544MHz or a 2.048MHz primary clock. Used to clock data
through the transmit side of the transceiver. TSER data is sampled on the falling
edge of TCLK. TCLK is used to sample TSER when the elastic store is not enabled
or IBO is not used. When the elastic store is enabled, TCLKn is used as the
internal transmit clock for the framer side or the elastic store including the transmit
framer and LIU. With the elastic store enabled, TCLKn can be either synchronous
or asynchronous to TSYSCLKn, which either prevents or allows for slips. In
addition, when IBO mode is enabled, TCLKn must be synchronous to TSYSCLKn,
which prevents slips in the elastic store.
Note: This clock must be provided for proper device operation. The only exception
is when the TCR3 register is configured to source TCLK internally from RCLK.
Transmit System Clock. 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or
16.384MHz clock. Only used when the transmit-side elastic store function is
enabled. Should be tied low in applications that do not use the transmit-side elastic
store. This is a common clock that is used for all eight transmitters. The clock can
be 4.096MHz, 8.912MHz, or 16.384MHz when IBO mode is used.
Transmit Synchronization. A pulse at these pins establishes either frame or
multiframe boundaries for the transmit side. These signals can also be
programmed to output either a frame or multiframe pulse. If these pins are set to
output pulses at frame boundaries, they can also be set to output double-wide
pulses at signaling frames in T1 mode. The operation of these signals is
synchronous with TCLK.
Transmit System Synchronization In. Only used when the transmit-side elastic
store is enabled. A pulse at this pin establishes either frame or multiframe
boundaries for the transmit side. Note that if the elastic store is enabled, frame or
multiframe boundary will be established for all eight transmitters. Should be tied
low in applications that do not use the transmit-side elastic store. The operation of
this signal is synchronous with TSYSCLK.
Transmit System Synchronization Out. If configured as an output, an 8kHz
pulse synchronous to the BPCLK will be generated. This pulse in combination with
BPCLK can be used as an IBO master. The BPCLK can be sourced to RSYSCLK,
TSYSCLK, and TSSYNCIO as a source to RSYNC, and TSSYNCIO of DS26528
or RSYNC and TSSYNC of other Dallas Semiconductor parts.
Transmit Signaling. When enabled, this input samples signaling bits for insertion
into outgoing PCM data stream. Sampled on the falling edge of TCLK when the
transmit-side elastic store is disabled. Sampled on the falling edge of TSYSCLK
when the transmit-side elastic store is enabled. In IBO mode, the TSIG streams
can run up to 16.384MHz.
TRANSMIT FRAMER
20 of 276
FUNCTION
DS26528 Octal T1/E1/J1 Transceiver