CS61577-IL1R Cirrus Logic Inc, CS61577-IL1R Datasheet - Page 8

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CS61577-IL1R

Manufacturer Part Number
CS61577-IL1R
Description
Network Controller & Processor ICs IC T1/E1 Low PWR Line Interface Unit
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS61577-IL1R

Product
Framer
Number Of Transceivers
1
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
PLCC-28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
THEORY OF OPERATION
CS61577 Enhancements Relative to CS61574
Existing designs using the CS61574 can be con-
verted to the higher performance, pin-compatible
CS61577 with no changes to the PCB, external
component or system software.
The CS61577 provides higher performance and
more features than the CS61574 including:
Introduction to Operating Modes
The CS61577 supports three operating modes
which are selected by the level of the MODE pin
as shown in Tables 1 and 2, Figure 7, and Figures
A1-A3 of the Applications section.
The modes are Hardware Mode, Extended Hard-
ware Mode, and Host Mode. In Hardware and
Extended Hardware Modes, discrete pins are used
to configure and monitor the device. The Ex-
tended Hardware Mode provides a parallel chip
select input which latches the control inputs al-
• Selection of 75 Ω or 120 Ω E1 output op-
• 50 mA
• 35% lower power consumption,
• Increased transmitter immunity to signal re-
• Optional AMI, B8ZS, HDB3 encoder/de-
• Receiver AIS (unframed all ones) detection,
• Improved receiver Loss of Signal handling
• Transmitter TTIP and TRING outputs are
• The Driver Performance Monitor operates
tions under software or hardware control,
limiting for E1 (per OFTEL OTR-001),
output options,
flections for improved signal quality,
coder or external line coding support,
(LOS set at power-up, reset upon receipt of
3 ones in 32 bit periods with no more than
15 consecutive zeros),
forced low when TCLK is static,
over a wider range of input signal levels.
internally controlled pulse width for E1
RMS
transmitter short-circuit current
lowing individual ICs to be configured using a
common set of control lines. In the Host Mode,
an external processor monitors and configures the
device through a serial interface. There are thir-
teen multi-function pins whose functionality is
determined by the operating mode. (see Table 2).
RECEIVER/DPM
TRANSMITTER
Performance
FUNCTION
Detection
CONTROL
Control
Monitor
MODE
Coding
Method
Table 1. Differences Between Operating Modes
Driver
Level
Line
AIS
Pin
Table 2. Pin Definitions
Hardware
PIN HARDWARE
11
17
18
18
23
24
25
26
27
28
External
3
4
6
7
Control
<0.2 V
Mode
Pins
Yes
No
RLOOP
MRING
LLOOP
RNEG
TNEG
RPOS
TPOS
LEN0
LEN1
LEN2
TAOS
MTIP
DPM
-
Control Pins
AMI, B8ZS,
with Parallel
Chip Select
Floating or
Hardware
Extended
or HDB3
Internal-
Mode
2.5 V
Yes
No
HARDWARE
EXTENDED
TCODE
RCODE
RLOOP
LLOOP
RDATA
MODE
TDATA
LEN0
LEN1
LEN2
TAOS
PCS
BPV
AIS
-
>(RV+)-0.2 V
Interface
External
Serial
Mode
Host
Yes
MRING
No
RNEG
RPOS
HOST
TPOS
TNEG
SCLK
CLKE
MTIP
DPM
SDO
INT
SDI
CS
-

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