LX256EB-35FN484C Lattice, LX256EB-35FN484C Datasheet - Page 34
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LX256EB-35FN484C
Manufacturer Part Number
LX256EB-35FN484C
Description
Analog & Digital Crosspoint ICs E-Series, 256 I/O Switch Matrix, 2.5V, 3.5ns, Pb-Free
Manufacturer
Lattice
Datasheet
1.LX256EV-5FN484C.pdf
(75 pages)
Specifications of LX256EB-35FN484C
Maximum Dual Supply Voltage
2.7 V
Minimum Dual Supply Voltage
2.3 V
Mounting Style
SMD/SMT
Number Of Arrays
1
Operating Supply Voltage
2.5 V
Supply Type
Triple
Configuration
256 x 256
Package / Case
FPBGA-484
Data Rate
38 Gbps
Input Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Output Level
Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
Maximum Operating Temperature
+ 90 C
Minimum Operating Temperature
0 C
Product
Digital Crosspoint
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Lattice Semiconductor
Figure 21. ispGDX2 Timing Model Diagram (in FIFO Only Mode)
(Global RESET)
from I/O Cell
from I/O Cell
(I/O RESET)
from I/O Cell
from I/O Cell
from I/O Cell
from I/O Cell
from I/O Cell
(WCLK)
(RCLK)
(DIN)
(WE)
(RE)
t
t
t
FIFODATAIN
t
HSIFIFORST
t
t
FIFOWCLK
FIFORCLK
FIFOWEN
FIFOREN
Data In
Write
Clock
Write
Enable
Read
Clock
Read
Enable
31
RESET
FIFO
FULL, EMPTY
FIFO Flags
Data Out
ispGDX2 Family Data Sheet
(Output Path Flags)
to I/O Cell
(DOUT)
to I/O Cell
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