TMC2074-NE SMSC, TMC2074-NE Datasheet - Page 33

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TMC2074-NE

Manufacturer Part Number
TMC2074-NE
Description
Network Controller & Processor ICs Standalone Mode CircLink Cntlr
Manufacturer
SMSC
Datasheet

Specifications of TMC2074-NE

Product
Controller Area Network (CAN)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Dual Mode CircLink™ Controller
Datasheet
2.6
2.6.1
NOTE:
SMSC TMC2074
Receiver:
The receiver rejects the packet and goes back to idle state.
CPU Interface
CPU Identification and Compatibility between Intel and Motorola
Processors
The CircLink controller can be connected to any combination of CPUs listed in Table 3 - - CPU Type. For
more information on setup, refer to section 1.6 - Setup Pins.
Table 4 - - Distinction and Matching of the CPU Type describes setup of pin functions of address bus/data,
bus/read write controls by nRWM and nMUX pins.
Symbol definition in Table 4:
D
A
AD
nWR
nRD
DIR
nDS(DS)
ALE
ALEPOL
D15 - D6
D/AD5 - D/AD0
A5-A4
A3
A2
A1-A0
nWR/DIR
nRD/nDS
Pin Name
Address Multiplexed
Data Bus width
Read / Write
Data Bus
Address Bus
Address / Data Bus
Write Signal (16 Bit CPU is nWRL)
Read Signal
Read / Write Signal
Data Strobe Signal (16 Bit CPU is nLDS) (Polarity is designated by nDSINV pin)
Address Latch Enable Signal
Designate ALE polarity
ITEM
Table 4- Distinction and Matching of the CPU Type
D15-D6
AD5-AD0
-
ALEPOL
ALE
-
nWR
nRD
nMUX=0
DATASHEET
Table 3 - CPU Type
Intel (80XX) Type
nRWM = 0
Non-MUX / Multiplexed
Page 33
DIR , nLDS(LDS)
D5-D0
D15-D6
A5-A4
A3
A2
A1-A0
nWR
nRD
nRD , nWRL
16 BIT CPU
8 bit/16 bit
nMUX=1
OR
CONNECTION CPU TYPE
D15-D6
AD5-AD0
-
ALEPOL
ALE
-
DIR
nDS(DS)
Motorola (68XX) Type
nMUX=0
Non-MUX / Multiplexed
DIR , nDS(DS)
nRWM=1
nRD , nWR
8 BIT CPU
8 bit
OR
D15-D6
D5-D0
A5-A4
A3
A2
A1-A0
DIR
nDS(DS)
Revision 0.2 (10-23-08)
nMUX=1

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