FDC640P Fairchild Semiconductor, FDC640P Datasheet - Page 2

MOSFET P-CH 20V 4.5A SSOT-6

FDC640P

Manufacturer Part Number
FDC640P
Description
MOSFET P-CH 20V 4.5A SSOT-6
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet

Specifications of FDC640P

Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
53 mOhm @ 4.5A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
4.5A
Vgs(th) (max) @ Id
1.5V @ 250µA
Gate Charge (qg) @ Vgs
13nC @ 4.5V
Input Capacitance (ciss) @ Vds
890pF @ 10V
Power - Max
800mW
Mounting Type
Surface Mount
Package / Case
6-SSOT, SuperSOT-6
Configuration
Single Quad Drain
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
0.053 Ohm @ 4.5 V
Forward Transconductance Gfs (max / Min)
16 S
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
+/- 12 V
Continuous Drain Current
4.5 A
Power Dissipation
1600 mW
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FDC640P

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Notes:
1. R
2. Pulse Test: Pulse Width
Electrical Characteristics
Symbol
Off Characteristics
BV
I
I
I
On Characteristics
V
R
I
g
Dynamic Characteristics
C
C
C
Switching Characteristics
t
t
t
t
Q
Q
Q
Drain–Source Diode Characteristics and Maximum Ratings
I
V
a. 78°C/W when mounted on a 1in
b. 156°C/W when mounted on a minimum pad.
f
DSS
GSSF
GSSR
D(on)
d(on)
r
d(off)
S
BV
V
FS
GS(th)
SD
DS(on)
iss
oss
rss
g
gs
gd
JA
GS(th)
DSS
T
T
pins. R
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain
DSS
J
J
JC
is guaranteed by design while R
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
300 s, Duty Cycle
Parameter
2
pad of 2oz copper on FR-4 board.
(Note 2)
(Note 2)
CA
2.0%
is determined by the user's board design.
V
I
V
V
V
V
I
V
V
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
T
D
D
A
GS
DS
GS
GS
DS
GS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
= –250 A, Referenced to 25 C
= –250 A, Referenced to 25 C
= 25°C unless otherwise noted
= –16 V,
= V
= –5 V,
= –10 V,
= –10 V,
= 0 V, I
= 12 V,
= –12 V,
= –4.5 V,
= –2.5 V,
= –4.5 V, I
= –4.5 V,
= –10 V,
= –4.5 V,
= –4.5 V
= 0 V,
Test Conditions
GS
, I
D
D
I
= –250 A
= –250 A
S
D
= –1.3 A
V
V
V
= –4.5A,T
I
I
V
I
GS
DS
DS
D
D
V
I
I
R
D
D
D
GS
DS
= –4.5 A
= –3.6 A
GEN
= –4.5 A,
= 0 V
= 0 V
= 0 V
= –4.5 A
= –1 A,
= 0 V,
= –5 V
= 6
(Note 2)
J
=125 C
Min
–0.6
–20
–20
0.039
0.062
0.053
Typ Max Units
–1.0
–0.7
–14
890
244
123
16
12
24
13
3
9
9
2
3
0.053
0.080
0.077
–100
–1.5
–1.3
–1.2
100
–1
22
18
38
23
13
FDC640P Rev E(W)
mV/ C
mV/ C
nC
nC
nC
nA
nA
pF
pF
pF
ns
ns
ns
ns
V
V
A
S
A
V
A

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