FDD5353 Fairchild Semiconductor, FDD5353 Datasheet - Page 2

• Manufacturer Part Number: FDD5353
• Description: MOSFET N-CH 60V 11.5A DPAK
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDD5353

• Fet Type: MOSFET N-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 12.3 mOhm @ 10.7A, 10V
• Drain To Source Voltage (vdss): 60V
• Current - Continuous Drain (id) @ 25° C: 11.5A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 65nC @ 10V
• Input Capacitance (ciss) @ Vds: 3215pF @ 30V
• Power - Max: 3.1W
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Configuration: Single
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 0.0123 Ohm @ 10 V
• Drain-source Breakdown Voltage: 60 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 11.5 A
• Power Dissipation: 3100 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDD5353TR

©2008 Fairchild Semiconductor Corporation
FDD5353 Rev.C
Notes:
1: R
2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3: Starting T
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
BV
∆BV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
Q
V
t
Q
DSS
GSS
∆V
d(on)
r
d(off)
f
rr
DS(on)
FS
GS(th)
SD
∆T
∆T
iss
oss
rss
g
g
g
gs
gd
rr
R
Symbol
DSS
θJA
θJC
GS(th)
DSS
J
J
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
is guaranteed by design while R
J
= 25
°
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
C, L = 3mH, I
AS
= 13A, V
Parameter
θJA
DD
is determined by the user’s board design.
= 60V, V
T
a)
GS
J
1 in
= 25°C unless otherwise noted
40°C/W when mounted on a
= 10V.
2
pad of 2 oz copper
V
V
V
V
V
I
V
V
V
V
V
f = 1MHz
f = 1MHz
I
I
V
V
V
V
I
D
D
D
F
GS
GS
GS
GS
DD
DS
DD
GS
GS
GS
GS
GS
GS
GS
= 10.7A, di/dt = 100A/µs
= 250µA, referenced to 25°C
= 250µA, V
= 250µA, referenced to 25°C
= 30V, I
= 10V, R
= 0V to 10V
= 0V to 4.5V
= 0V, V
= V
= 10V, I
= 4.5V, I
= 10V, I
= 5V, I
= 30V, V
= 0V, I
= 0V, I
= ±20V, V
2
DS
Test Conditions
, I
S
S
D
DS
D
D
D
= 10.7A
= 2.6A
D
GS
GEN
D
= 10.7A
GS
= 10.7A,
= 10.7A, T
DS
= 10.7A
= 250µA
= 48V,
= 9.5A
= 0V,
= 0V
= 0V
= 6Ω
V
I
D
DD
= 10.7A
= 30V,
J
(Note 2)
(Note 2)
= 125°C
b)
96°C/W
on a minimum pad.
Min
1.0
60
when
2420
10.1
12.1
16.7
mounted
Typ
215
120
1.7
0.8
0.7
1.8
36
46
23
28
21
41
11
77
-8
6
4
7
9
3215
Max
±100
12.3
15.4
20.3
285
180
1.3
1.2
3.0
20
58
10
65
32
45
34
11
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1
mV/°C
mV/°C
Units
mΩ
pF
pF
pF
nC
nC
nC
nC
nC
ns
µA
nA
ns
ns
ns
ns
Ω
V
V
S
V