TMC2192KHC Fairchild Semiconductor, TMC2192KHC Datasheet - Page 46

• Manufacturer Part Number: TMC2192KHC
• Description: Video ICs
• Manufacturer: Fairchild Semiconductor
• Type: Encoderr

Specifications of TMC2192KHC

• Operating Supply Voltage: - 0.5 V to + 7 V
• Supply Current: 375 mA
• Maximum Operating Temperature: 70 C
• Package / Case: MQFP-100
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TMC2192
Control Register Definitions
VBI Ped Enable Register (0x17)
Vertical Blanking Interval Enable Register (0x18)
46
Reg
17
17
Reg
18
18
18
18
Reserved
7
7
Bit
7-1
0
Bit
7
6
5
4-0
GLKCTL1
Name
VBIPEDOM
HVA
Name
Reserved
GLKCTL1
GLKCTL0
VBIENF
6
6
GLKCTL0
5
5
Description
VBI Pedestal Enable, Odd Fields.
VBIPEDOL is the bits 6-0 of VBIPEDO[14:0]. VBIPEDO controls the
addition of pedestal on a line by line basis from line 273 (VBIPEDE[0] =
HIGH) to line 286 (VBIPEDE[13] = HIGH) in the ODD field of NTSC.
VBIPEDO[14] controls the pedestal from line 287 to line 525 inclusive.
Horizontal and Vertical Sync Alignment.
When HVA is LOW, the falling edge of HSIN and VSIN must occur just prior
to the rising edge of PXCK to start an field 1. When HVA is HIGH, VSIN is
allowed to vary from HSIN by 32 pixels.
Description
Genlock Control Register 1.
When GLKCTL1 is LOW, the PALODD bit of the GRS stream is ignored.
When GLKCTL1 is HIGH, the PALODD bit of the GRS stream controls the
PALODD flip of the subcarrier.
Genlock Control Register 0.
When GLKCTL0 is LOW, the Color Frame bit of the GRS stream is ignored.
When GLKCTL0 is HIGH, the Color Frame bit of the GRS stream controls
the field sequence in the FVHGEN.
VBI Active Video Enable, Field 1.
The value of VBIENF1 determines which line blanking stops and active line
for EVEN fields in NTSC starting from line 4 to line 35 or an ODD fields for
PAL starting from line 1 to line 32.
(continued)
VBIPEDOL
4
4
3
3
VBIENF1
2
2
PRODUCT SPECIFICATION
1
1
REV. 1.0.0 8/13/03
HVA
0
0