MT88E43BSR1 Zarlink, MT88E43BSR1 Datasheet - Page 24

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MT88E43BSR1

Manufacturer Part Number
MT88E43BSR1
Description
Caller ID CMOS 3.58MHz 3.3V/5V 24-Pin SOIC T/R
Manufacturer
Zarlink
Datasheet

Specifications of MT88E43BSR1

Package
24SOIC
Telecommunication Standards Supported
GR-30|SIN227|SIN242|SR-TSV-002476|TR-NWT-000030
Fabrication Technology
CMOS
Maximum Data Rate
1212 Bd
Typical Operating Supply Voltage
3.3|5 V
Typical Supply Current
3 mA
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
85 °C
Operating Frequency
3.58 MHz

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT88E43BSR1
Manufacturer:
zarlink
Quantity:
53
Notes:
1) TW/P&E/312 specifies that the AC and DC loads should be removed between 50 to 150 ms after the end of the FSK signal, indicated
2) FSKen should be set low when FSK is not expected to prevent the FSK demodulator from reacting to other in-band signals such as
3) TRIGout represents the ring envelope during ringing.
A/B Wires
TRIGout
PWDN
TE DC load
TE AC load
FSKen
CD
DR
DCLK
DATA
OSCout
by CD returning to high. The MT88E43 may also be powered down at this time.
speech, and DTMF tones.
Line Reversal
Figure 18 - Input and Output Timing for CCA Caller Display Service (CDS), e.g., CLIP
Ring Burst
250-400ms
Note 3
t
PU
A
B
Ch. seizure
..101010..
t
Zarlink Semiconductor Inc.
CP
C
MT88E43B
24
Mark
D
Data Packet
50-150ms
Data
E
t
PD
F
Note 1
Note 2
t
CA
First Ring Cycle
A = 200-450ms
B ≥ 500ms
C = 80-262ms
D = 45-262ms
E ≤ 2.5s (typ. 500ms)
F >200ms
Note:
from "CCA Exceptions
Document Issue 3"
Note 3
Parameter
Data Sheet
F

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