92HD89B2X5NDGXZBX Integrated Device Technology (Idt), 92HD89B2X5NDGXZBX Datasheet - Page 56

• Manufacturer Part Number: 92HD89B2X5NDGXZBX
• Description: Audio Codec 2ADC / 2DAC 24-Bit 40-Pin VFQFPN Tray
• Manufacturer: Integrated Device Technology (Idt)
• Type: PCMr

Specifications of 92HD89B2X5NDGXZBX

• Package: 40VFQFPN
• Adc/dac Resolution: 24 Bit
• Number Of Channels: 2ADC /2 DAC
• Sampling Rate: 192 KSPS
• Number Of Adc Inputs: 10
• Number Of Dac Outputs: 11
• Number Of Dacs: 2
• Operating Supply Voltage: 1.5|3.3|5 V

92HD89B
Four channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
S3D3ColdSup
Rsvd
D3ColdSup
D3Sup
D2Sup
D1Sup
D0Sup
Field Name
GPIWake
GPIUnsol
Reg
Get
Set
7.4.7.
Byte 4 (Bits 31:24)
AFG (NID = 01h): GPIOCnt
Bits
29
Codec state intended during system S3 state: 1 = D3Hot, 0 = D3Cold.
On YB revs & prior, this was called LPD3Sup & default was 0h.
28:5
Reserved.
4
D3Cold power state support: 1 = yes, 0 = no.
3
D3 power state support: 1 = yes, 0 = no.
2
D2 power state support: 1 = yes, 0 = no.
1
D1 power state support: 1 = yes, 0 = no.
0
D0 power state support: 1 = yes, 0 = no.
Bits
31
Wake capability. Assuming the Wake Enable Mask controls are enabled,
GPIO's configured as inputs can cause a wake (generate a Status Change
event on the link) when there is a change in level on the pin.
30
GPIO unsolicited response support: 1 = yes, 0 = no.
Byte 3 (Bits 23:16)
R/W
R
R
R
R
R
R
R
R/W
R
R
F0011h
Default
1h
000000h
1h
1h
1h
1h
1h
Default
1h
1h
56
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
N/A (Hard-coded)
Reset
N/A (Hard-coded)
N/A (Hard-coded)
Byte 1 (Bits 7:0)
V 1.0 11/10
92HD89B