92HD89B2X5NDGXZBX Integrated Device Technology (Idt), 92HD89B2X5NDGXZBX Datasheet - Page 60

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92HD89B2X5NDGXZBX

Manufacturer Part Number
92HD89B2X5NDGXZBX
Description
Audio Codec 2ADC / 2DAC 24-Bit 40-Pin VFQFPN Tray
Manufacturer
Integrated Device Technology (Idt)
Type
PCMr
Datasheet

Specifications of 92HD89B2X5NDGXZBX

Package
40VFQFPN
Adc/dac Resolution
24 Bit
Number Of Channels
2ADC /2 DAC
Sampling Rate
192 KSPS
Number Of Adc Inputs
10
Number Of Dac Outputs
11
Number Of Dacs
2
Operating Supply Voltage
1.5|3.3|5 V
92HD89B
Four channel HD Audio codec optimized for low power
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
Rsvd
Data4
Data3
Data2
Data1
Data0
Reg
Get
Set
7.4.12. AFG (NID = 01h): GPIOEn
Byte 4 (Bits 31:24)
Bits
31:5
Reserved.
4
Data for GPIO4. If this GPIO bit is configured as Sticky (edge-sensitive) imput,
it can be cleared by writing “0”. For details of read back value, refer to HD Audio
spec. section 7.3.3.22.
3
Data for GPIO4. If this GPIO bit is configured as Sticky (edge-sensitive) imput,
it can be cleared by writing “0”. For details of read back value, refer to HD Audio
spec. section 7.3.3.22.
2
Data for GPIO2. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22.
1
Data for GPIO1. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22.
0
Data for GPIO0. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22.
Byte 3 (Bits 23:16)
R/W
R
RW
RW
RW
RW
RW
F1600h
Default
00000000h
0h
0h
0h
0h
0h
60
Byte 2 (Bits 15:8)
Reset
N/A (Hard-coded)
POR-DAFG-ULR
POR-DAFG-ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Byte 1 (Bits 7:0)
716h
V 1.0 11/10
92HD89B

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