SCC2681AC1N40 NXP Semiconductors, SCC2681AC1N40 Datasheet - Page 7

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SCC2681AC1N40

Manufacturer Part Number
SCC2681AC1N40
Description
UART 2-CH 5V 40-Pin PDIP Tube
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SCC2681AC1N40

Package
40PDIP
Number Of Channels Per Chip
2
Maximum Data Rate
0.1152 MBd
Transmitter And Receiver Fifo Counter
No
Operating Supply Voltage
5 V
Minimum Single Supply Voltage
4.75 V
Maximum Processing Temperature
260 °C
Maximum Supply Current
10 mA

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Quantity
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Part Number:
SCC2681AC1N40
Manufacturer:
NXP
Quantity:
5 510
8. Consecutive write operations to the same command register require at least three edges of the X1 clock between writes.
9. This parameter is not applicable to the 28-pin device.
10. Operation to 0 MHz is assured by design. However, operation at low frequencies is not tested and has not been characterized.
Philips Semiconductors
BLOCK DIAGRAM
2004 Apr 06
Dual asynchronous receiver/transmitter (DUART)
X1/CLK
RESET
INTRN
D0–D7
A0–A3
WRN
CEN
RDN
X2
4
8
OPERATION CONTROL
INTERRUPT CONTROL
R/W CONTROL
BUS BUFFER
GENERATOR
SELECTORS
BAUD RATE
COUNTER/
XTAL OSC
ADDRESS
DECODE
CLOCK
TIMING
TIMER
CTUR
CSRB
CTLR
CSRA
IMR
ACR
ISR
Figure 2. Block Diagram
7
SHIFT REGISTER
HOLDING REG (3)
SHIFT REGISTER
SELECT LOGIC
DETECTORS (4)
HOLDING REG
OUTPUT PORT
CHANNEL A
CHANNEL B
(AS ABOVE)
INPUT PORT
CHANGE OF
FUNCTION
TRANSMIT
TRANSMIT
RECEIVE
RECEIVE
MRA1, 2
STATE
OPCR
OPR
CRA
SRA
IPCR
ACR
7
8
SCC2681
SD00085
TxDA
RxDA
TxDB
RxDB
IP0-IP6
OP0-OP7
V
GND
Product data
CC

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