AD7888ARU Analog Devices Inc, AD7888ARU Datasheet - Page 7

• Manufacturer Part Number: AD7888ARU
• Description: ADC Single SAR 125KSPS 12-Bit Serial 16-Pin TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7888ARU

• Package: 16TSSOP
• Resolution: 12 Bit
• Sampling Rate: 125 KSPS
• Architecture: SAR
• Number Of Adcs: 1
• Number Of Analog Inputs: 8
• Digital Interface Type: Serial (SPI, QSPI, Microwire)
• Input Type: Voltage
• Signal To Noise Ratio: 71 dB
• Polarity Of Input Voltage: Unipolar
• Rohs Status: RoHS non-compliant
• Number Of Bits: 12
• Sampling Rate (per Second): 125k
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 3.5mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Number Of Elements: 1
• Sample Rate: 125KSPS
• Input Polarity: Unipolar
• Rated Input Volt: 5.25V
• Differential Input: No
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.25V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Power Dissipation: 3.5mW
• Differential Linearity Error: ±2LSB
• Integral Nonlinearity Error: ±2LSB
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Input Signal Type: Single-Ended
• Lead Free Status / Rohs Status: Not Compliant

REV. C
PERFORMANCE CURVES
Figure 2 shows a typical FFT plot for the AD7888 at 100 kHz
sample rate and 10 kHz input frequency.
CONTROL REGISTER
The Control Register on the AD7888 is an 8-bit, write-only register. Data is loaded from the DIN pin of the AD7888 on the rising
edge of SCLK. The data is transferred on the DIN line at the same time as the conversion result is read from the part. This requires
16 serial clocks for every data transfer. Only the information provided on the first 8 rising clock edges (after CS falling edge) is loaded
to the Control Register. MSB denotes the first bit in the data stream. The bit functions are outlined in Table I. The default contents
of the Control Register on power-up is all zeros.
Bit
7
6
5
4
3
2
1, 0
–110
Mnemonic
DONTC
ZERO
ADD2
ADD1
ADD0
REF
PM1, PM0
–10
–30
–50
–70
–90
0
MSB
D
12.21
O
Comment
Don’t Care. The value written to this bit of the Control Register is a don’t care, i.e., it doesn’t matter if the bit is
0 or 1.
A zero must be written to this bit to ensure correct operation of the AD7888.
These three address bits are loaded at the end of the present conversion sequence and select which analog input
channel is converted for the next conversion. The selected input channel is decoded as shown in Table II.
Reference Bit. With a 0 in this bit, the on-chip reference is enabled. With a 1 in this bit, the on-chip reference
is disabled. To obtain best performance from the AD7888, the internal reference should be disabled when
using an externally applied reference source. (See On-Chip Reference section.)
Power Management Bits. These two bits decode the mode of operation of the AD7888 as shown in Table III.
N
T
FREQUENCY – kHz
C
24.41
Z
E
R
O
Table I. Control Register Bit Function Description
4096 POINT FFT
SAMPLING
100kSPS
f
SNR = 70dB
IN
= 10kHz
36.62
A
D
D
2
48.83
A
D
D
1
Figure 3 shows a typical plot for the SNR vs. frequency for a
5 V supply and with a 5 V external reference.
A
D
D
0
73.0
72.5
72.0
71.5
71.0
0
R
E
F
10.89
INPUT FREQUENCY – kHz
P
M
1
21.14
P
V
5V EXT REFERENCE
DD
M
= 5V
0
31.59
AD7888
42.14