74HC138D NXP Semiconductors, 74HC138D Datasheet

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74HC138D

Manufacturer Part Number
74HC138D
Description
Decoder/Demultiplexer Single 3-to-8 16-Pin SO Bulk
Manufacturer
NXP Semiconductors
Datasheet
1.74HCT138N652.pdf (23 pages)

Specifications of 74HC138D

Package
16SO
Logic Function
Decoder/Demultiplexer
Logic Family
HC
Number Of Element Outputs
8
Number Of Elements Per Chip
1
Number Of Input Enables Per Element
3
Demultiplexing Capability
1-of-8
Fabrication Technology
CMOS
Typical Operating Supply Voltage
5 V
Operating Temperature
-40 to 125 °C

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1. General description
2. Features
The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL).
The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1
and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).
The 74HC138; 74HCT138 features three enable inputs: two active LOW (E1 and E2) and
one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is
HIGH.
This multiple enable function allows easy parallel expansion of the 74HC138; 74HCT138
to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138; 74HCT138 ICs and one
inverter.
The 74HC138; 74HCT138 can be used as an eight output demultiplexer by using one of
the active LOW enable inputs as the data input and the remaining enable inputs as
strobes. Not used enable inputs must be permanently tied to their appropriate active
HIGH- or LOW-state.
The 74HC138; 74HCT138 is identical to the 74HC238; 74HCT238 but has inverting
outputs.
74HC138; 74HCT138
3-to-8 line decoder/demultiplexer; inverting
Rev. 03 — 23 December 2005
Demultiplexing capability
Multiple input enable for easy expansion
Complies with JEDEC standard no. 7A
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
ESD protection:
Specified from 40 C to +85 C and from 40 C to +125 C
HBM EIA/JESD22-A114-C exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
Product data sheet

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74HC138D Summary of contents

Page 1

Rev. 03 — 23 December 2005 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The 74HC138; 74HCT138 decoder accepts three binary ...

Page 2

... number of inputs switching Ordering information Table 2: Ordering information Type number Package Temperature range Name 74HC138 74HC138N +125 C 74HC138D +125 C 74HC138DB +125 C 74HC138PW +125 C 74HC138BQ +125 C 74HC_HCT138_3 Product data sheet Quick reference data = ns. amb r f Conditions propagation delay ...

Page 3

Philips Semiconductors Table 2: Ordering information Type number Package Temperature range Name 74HCT138 74HCT138N +125 C 74 HCT138D +125 C 74HCT138DB +125 C 74HCT138PW +125 C 74HCT138BQ 40 ...

Page 4

Philips Semiconductors Fig 3. Logic diagram 6. Pinning information 6.1 Pinning Fig 4. Pin configuration DIP16, SO16, 74HC_HCT138_3 Product data sheet 74HC138 74HCT138 ...

Page 5

Philips Semiconductors 6.2 Pin description Table 3: Symbol GND Functional description Table 4: Control [ HIGH ...

Page 6

Philips Semiconductors 8. Limiting values Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol GND T ...

Page 7

Philips Semiconductors 10. Static characteristics Table 7: Static characteristics 74HC138 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter amb V HIGH-state input voltage IH V LOW-state input voltage IL ...

Page 8

Philips Semiconductors Table 7: Static characteristics 74HC138 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-state output voltage OL I input leakage current LI I OFF-state output current OZ I quiescent supply ...

Page 9

Philips Semiconductors Table 8: Static characteristics 74HCT138 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter amb V HIGH-state input voltage IH V LOW-state input voltage IL V HIGH-state output ...

Page 10

Philips Semiconductors Table 8: Static characteristics 74HCT138 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter +125 C amb V HIGH-state input voltage IH V LOW-state input voltage IL ...

Page 11

Philips Semiconductors 11. Dynamic characteristics Table 9: Voltages are referenced to GND (ground = 0 V); C For test circuit see Symbol Parameter amb t , PHL t PLH t , THL t TLH C PD ...

Page 12

Philips Semiconductors Table 9: Voltages are referenced to GND (ground = 0 V); C For test circuit see Symbol Parameter t , THL t TLH +125 C amb t , PHL t PLH t , ...

Page 13

Philips Semiconductors Table 10: Voltages are referenced to GND (ground = 0 V); C For test circuit see Symbol Parameter amb t , PHL t PLH t , THL t TLH ...

Page 14

Philips Semiconductors V = supply voltage number of inputs switching 12. Waveforms Fig 6. Propagation delay input (An) and enable input (E3) to output (Yn) and transition Fig 7. Propagation delay enable input ...

Page 15

Philips Semiconductors Fig 8. Load circuitry for measuring switching times Table 12: Type 74HC138 74HCT138 74HC_HCT138_3 Product data sheet negative V M pulse positive ...

Page 16

Philips Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil); long body pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. ...

Page 17

Philips Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 ...

Page 18

Philips Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

Page 19

Philips Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1.80 mm ...

Page 20

Philips Semiconductors DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm terminal 1 index area terminal 1 index area ...

Page 21

Philips Semiconductors 14. Abbreviations Table 13: Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 15. Revision history Table 14: Revision history ...

Page 22

Philips Semiconductors 16. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

Page 23

Philips Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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