74LVC74APW-T NXP Semiconductors, 74LVC74APW-T Datasheet - Page 9

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74LVC74APW-T

Manufacturer Part Number
74LVC74APW-T
Description
Flip Flop D-Type Pos-Edge 2-Element 14-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC74APW-T

Package
14TSSOP
Logic Function
D-Type
Logic Family
LVC
Number Of Element Outputs
1
Number Of Elements Per Chip
2
Input Signal Type
Single-Ended
Output Signal Type
Differential
Set/reset
Set/Reset
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Operating Temperature
-40 to 125 °C
NXP Semiconductors
Table 9.
74LVC74A_6
Product data sheet
Supply voltage
1.2 V
2.7 V
3.0 V to 3.6 V
Fig 9. Load circuitry for switching times
Test data is given in
Definitions for test circuit:
R
C
R
L
L
T
Test data
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to output impedance Z
Table
9.
negative
positive
pulse
pulse
Input
V
V
2.7 V
2.7 V
GENERATOR
0 V
0 V
I
CC
V
V
PULSE
I
I
90 %
10 %
t
t
Rev. 06 — 4 June 2007
f
r
Dual D-type flip-flop with set and reset; positive-edge trigger
V
V
V
M
M
I
10 %
90 %
R T
t
r
, t
2.5 ns
2.5 ns
2.5 ns
V
DUT
f
t
t
CC
W
W
o
of the pulse generator.
V
O
V
V
M
M
t
t
r
C L
f
001aaf615
Load
C
50 pF
50 pF
50 pF
L
R L
74LVC74A
© NXP B.V. 2007. All rights reserved.
R
500
500
500
L
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