MT46H16M16LFBF-6:H Micron Technology Inc, MT46H16M16LFBF-6:H Datasheet - Page 67

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MT46H16M16LFBF-6:H

Manufacturer Part Number
MT46H16M16LFBF-6:H
Description
DRAM Chip DDR SDRAM 256M-Bit 16Mx16 1.8V 60-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Series
-r

Specifications of MT46H16M16LFBF-6:H

Package
60VFBGA
Density
256 Mb
Address Bus Width
15 Bit
Operating Supply Voltage
1.8 V
Maximum Clock Rate
166 MHz
Maximum Random Access Time
6.5|5 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
256M (16Mx16)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Package / Case
60-VFBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT46H16M16LFBF-6:H
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Company:
Part Number:
MT46H16M16LFBF-6:H
Quantity:
568
Part Number:
MT46H16M16LFBF-6:H TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
DQ (First data no longer valid)
Figure 30: Data Output Timing –
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. I 09/10 EN
DQ (First data no longer valid)
DQ and DQS, collectively
DQS0/DQS1/DQS2/DQS3
DQ (Last data valid)
DQ (Last data valid)
Notes:
CK#
DQ
DQ
DQ
DQ
DQ
DQ
CK
6,7
4
4
4
4
4
4
4
4
T1
1.
2. DQ transitioning after DQS transitions define the
3.
4. Byte 0 is DQ[7:0], byte 1 is DQ[15:8], byte 2 is DQ[23:16], byte 3 is DQ[31:24].
5.
6. The data valid window is derived for each DQS transition and is
7. DQ[7:0] and DQS0 for byte 0; DQ[15:8] and DQS1 for byte 1; DQ[23:16] and DQS2 for
t
t
DQS transition and ends with the last valid DQ transition.
t
byte 2; DQ[31:23] and DQS3 for byte 3.
t
HP
HP is the lesser of
DQSQ is derived at each DQS clock edge and is not cumulative over time; it begins with
QH is derived from
1
t
DQSQ,
t
HP
t
DQSQ
1
t
QH
t
QH, and Data Valid Window (x32)
T2
Data valid
5
2,3
window
t
CL or
t
T2
T2
T2
HP:
t
HP
1
t
t
t
QH =
DQSQ
CH clock transition collectively when a bank is active.
67
T2n
t
QH
Data valid
5
window
2,3
t
256Mb: x16, x32 Mobile LPDDR SDRAM
t
HP -
T2n
T2n
T2n
HP
1
t
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T3
QHS.
t
DQSQ
t
QH
t
5
2,3
Data valid
HP
window
1
T3
T3
T3
T3n
t
DQSQ window.
t
DQSQ
t
t
HP
QH
1
5
Data valid
2,3
window
T4
T3n
T3n
T3n
© 2008 Micron Technology, Inc. All rights reserved.
t
READ Operation
QH -
t
DQSQ.

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