MT48LC4M16A2P-75 L:G Micron Technology Inc, MT48LC4M16A2P-75 L:G Datasheet - Page 25

• Manufacturer Part Number: MT48LC4M16A2P-75 L:G
• Description: DRAM Chip SDRAM 64M-Bit 4Mx16 3.3V 54-Pin TSOP-II Tray
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC4M16A2P-75 L:G

• Package: 54TSOP-II
• Density: 64 Mb
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Clock Rate: 133 MHz
• Maximum Random Access Time: 6|5.4 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 64M (4M x 16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 54-TSOP II
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 12:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
Consecutive READ Bursts
Note:
COMMAND
COMMAND
ADDRESS
ADDRESS
Each READ command may be to any bank. DQM is LOW.
CLK
CLK
DQ
DQ
T0
T0
BANK,
COL n
BANK,
READ
COL n
READ
CAS Latency = 2
CAS Latency = 3
T1
T1
NOP
NOP
25
T2
T2
NOP
NOP
D
OUT
n
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T3
T3
NOP
NOP
D
n + 1
D
OUT
OUT
n
TRANSITIONING DATA
T4
T4
BANK,
BANK,
READ
COL b
READ
COL b
X = 1 cycle
n + 2
n + 1
D
D
OUT
OUT
X = 2 cycles
64Mb: x4, x8, x16 SDRAM
T5
T5
NOP
NOP
n + 2
n + 3
D
D
OUT
OUT
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T6
T6
NOP
NOP
n + 3
D
D
OUT
OUT
b
DON’T CARE
Commands
T7
NOP
D
OUT
b