N25Q128A13BSF40G NUMONYX, N25Q128A13BSF40G Datasheet - Page 154

• Manufacturer Part Number: N25Q128A13BSF40G
• Description: SERIAL NOR
• Manufacturer: NUMONYX

9.3.24
154/180
DQ0
DQ3
DQ1
DQ2
S
C
Figure 94. Read Volatile Enhanced Configuration Register instruction sequence
Write Volatile Enhanced Configuration Register
The Write Volatile Enhanced Configuration register (WRVECR) instruction allows new
values to be written to the Volatile Enhanced Configuration register. Before it can be
accepted, a write enable (WREN) instruction must previously have been executed. In case
of Fast POR the WREN instruction is not required because a WREN instruction gets the
device out from the Fast POR state (See
Apart form the parallelizing of the instruction code and the input data on the four pins DQ0,
DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the Write Volatile
Enhanced Configuration Register (WRVECR) instruction of the Extended SPI protocol,
please refer to
details.
Instruction
QIO-SPI
0
Section 9.1.33: Write Volatile Enhanced Configuration Register
1
2
5
4
6
7
3
1
0
2
3
4
5
4
6
7
5
1
0
2
3
Configuration Register Out
6
5
4
6
7
Volatile Enhanced
Section 11.1: Fast
7
1
0
2
3
8
5
4
6
7
9 10 11 12 13 14 15
1
0
3
2
5
4
7
6
1
0
3
2
POR).
4
5
7
6
0
1
3
2
4
5
7
6
Quad_Read_VECR
0
1
3
2
for further